|
@@ -39,30 +39,30 @@
|
|
|
#include <plat/fpga.h>
|
|
|
|
|
|
#define OMAP_MMC_REG_CMD 0x00
|
|
|
-#define OMAP_MMC_REG_ARGL 0x04
|
|
|
-#define OMAP_MMC_REG_ARGH 0x08
|
|
|
-#define OMAP_MMC_REG_CON 0x0c
|
|
|
-#define OMAP_MMC_REG_STAT 0x10
|
|
|
-#define OMAP_MMC_REG_IE 0x14
|
|
|
-#define OMAP_MMC_REG_CTO 0x18
|
|
|
-#define OMAP_MMC_REG_DTO 0x1c
|
|
|
-#define OMAP_MMC_REG_DATA 0x20
|
|
|
-#define OMAP_MMC_REG_BLEN 0x24
|
|
|
-#define OMAP_MMC_REG_NBLK 0x28
|
|
|
-#define OMAP_MMC_REG_BUF 0x2c
|
|
|
-#define OMAP_MMC_REG_SDIO 0x34
|
|
|
-#define OMAP_MMC_REG_REV 0x3c
|
|
|
-#define OMAP_MMC_REG_RSP0 0x40
|
|
|
-#define OMAP_MMC_REG_RSP1 0x44
|
|
|
-#define OMAP_MMC_REG_RSP2 0x48
|
|
|
-#define OMAP_MMC_REG_RSP3 0x4c
|
|
|
-#define OMAP_MMC_REG_RSP4 0x50
|
|
|
-#define OMAP_MMC_REG_RSP5 0x54
|
|
|
-#define OMAP_MMC_REG_RSP6 0x58
|
|
|
-#define OMAP_MMC_REG_RSP7 0x5c
|
|
|
-#define OMAP_MMC_REG_IOSR 0x60
|
|
|
-#define OMAP_MMC_REG_SYSC 0x64
|
|
|
-#define OMAP_MMC_REG_SYSS 0x68
|
|
|
+#define OMAP_MMC_REG_ARGL 0x01
|
|
|
+#define OMAP_MMC_REG_ARGH 0x02
|
|
|
+#define OMAP_MMC_REG_CON 0x03
|
|
|
+#define OMAP_MMC_REG_STAT 0x04
|
|
|
+#define OMAP_MMC_REG_IE 0x05
|
|
|
+#define OMAP_MMC_REG_CTO 0x06
|
|
|
+#define OMAP_MMC_REG_DTO 0x07
|
|
|
+#define OMAP_MMC_REG_DATA 0x08
|
|
|
+#define OMAP_MMC_REG_BLEN 0x09
|
|
|
+#define OMAP_MMC_REG_NBLK 0x0a
|
|
|
+#define OMAP_MMC_REG_BUF 0x0b
|
|
|
+#define OMAP_MMC_REG_SDIO 0x0d
|
|
|
+#define OMAP_MMC_REG_REV 0x0f
|
|
|
+#define OMAP_MMC_REG_RSP0 0x10
|
|
|
+#define OMAP_MMC_REG_RSP1 0x11
|
|
|
+#define OMAP_MMC_REG_RSP2 0x12
|
|
|
+#define OMAP_MMC_REG_RSP3 0x13
|
|
|
+#define OMAP_MMC_REG_RSP4 0x14
|
|
|
+#define OMAP_MMC_REG_RSP5 0x15
|
|
|
+#define OMAP_MMC_REG_RSP6 0x16
|
|
|
+#define OMAP_MMC_REG_RSP7 0x17
|
|
|
+#define OMAP_MMC_REG_IOSR 0x18
|
|
|
+#define OMAP_MMC_REG_SYSC 0x19
|
|
|
+#define OMAP_MMC_REG_SYSS 0x1a
|
|
|
|
|
|
#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
|
|
|
#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
|
|
@@ -78,8 +78,9 @@
|
|
|
#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
|
|
|
#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
|
|
|
|
|
|
-#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG_##reg)
|
|
|
-#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG_##reg)
|
|
|
+#define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg << (host)->reg_shift)
|
|
|
+#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg))
|
|
|
+#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG(host, reg))
|
|
|
|
|
|
/*
|
|
|
* Command types
|
|
@@ -133,6 +134,7 @@ struct mmc_omap_host {
|
|
|
int irq;
|
|
|
unsigned char bus_mode;
|
|
|
unsigned char hw_bus_mode;
|
|
|
+ unsigned int reg_shift;
|
|
|
|
|
|
struct work_struct cmd_abort_work;
|
|
|
unsigned abort:1;
|
|
@@ -680,9 +682,9 @@ mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
|
|
|
host->data->bytes_xfered += n;
|
|
|
|
|
|
if (write) {
|
|
|
- __raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
|
|
|
+ __raw_writesw(host->virt_base + OMAP_MMC_REG(host, DATA), host->buffer, n);
|
|
|
} else {
|
|
|
- __raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
|
|
|
+ __raw_readsw(host->virt_base + OMAP_MMC_REG(host, DATA), host->buffer, n);
|
|
|
}
|
|
|
}
|
|
|
|
|
@@ -900,7 +902,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
|
|
|
int dst_port = 0;
|
|
|
int sync_dev = 0;
|
|
|
|
|
|
- data_addr = host->phys_base + OMAP_MMC_REG_DATA;
|
|
|
+ data_addr = host->phys_base + OMAP_MMC_REG(host, DATA);
|
|
|
frame = data->blksz;
|
|
|
count = sg_dma_len(sg);
|
|
|
|
|
@@ -1493,6 +1495,8 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
+ host->reg_shift = (cpu_is_omap7xx() ? 1 : 2);
|
|
|
+
|
|
|
return 0;
|
|
|
|
|
|
err_plat_cleanup:
|