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@@ -4715,6 +4715,20 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
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return ret;
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}
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+static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
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+ struct intel_crtc_config *pipe_config)
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+{
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+ struct drm_device *dev = crtc->base.dev;
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+ uint32_t tmp;
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+
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+ tmp = I915_READ(PIPECONF(crtc->pipe));
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+ if (!(tmp & PIPECONF_ENABLE))
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+ return false;
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+
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+ return true;
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+}
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+
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static void ironlake_init_pch_refclk(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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@@ -5414,7 +5428,6 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc)
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&intel_crtc->config.adjusted_mode;
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struct intel_link_m_n m_n = {0};
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int target_clock, lane, link_bw;
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- uint32_t bps;
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/* FDI is a binary signal running at ~2.7GHz, encoding
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* each output octet as 10 bits. The actual frequency
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@@ -5670,6 +5683,20 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
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return fdi_config_ok ? ret : -EINVAL;
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}
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+static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
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+ struct intel_crtc_config *pipe_config)
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+{
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+ struct drm_device *dev = crtc->base.dev;
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+ uint32_t tmp;
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+
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+ tmp = I915_READ(PIPECONF(crtc->pipe));
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+ if (!(tmp & PIPECONF_ENABLE))
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+ return false;
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+
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+ return true;
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+}
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+
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static void haswell_modeset_global_resources(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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@@ -5784,6 +5811,20 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
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return ret;
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}
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+static bool haswell_get_pipe_config(struct intel_crtc *crtc,
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+ struct intel_crtc_config *pipe_config)
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+{
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+ struct drm_device *dev = crtc->base.dev;
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+ uint32_t tmp;
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+
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+ tmp = I915_READ(PIPECONF(crtc->cpu_transcoder));
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+ if (!(tmp & PIPECONF_ENABLE))
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+ return false;
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+
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+ return true;
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+}
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+
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static int intel_crtc_mode_set(struct drm_crtc *crtc,
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int x, int y,
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struct drm_framebuffer *fb)
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@@ -7717,12 +7758,21 @@ intel_modeset_update_state(struct drm_device *dev, unsigned prepare_pipes)
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base.head) \
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if (mask & (1 <<(intel_crtc)->pipe)) \
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+static bool
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+intel_pipe_config_compare(struct intel_crtc_config *current_config,
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+ struct intel_crtc_config *pipe_config)
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+{
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+ return true;
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+}
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+
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void
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intel_modeset_check_state(struct drm_device *dev)
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{
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+ drm_i915_private_t *dev_priv = dev->dev_private;
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struct intel_crtc *crtc;
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struct intel_encoder *encoder;
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struct intel_connector *connector;
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+ struct intel_crtc_config pipe_config;
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list_for_each_entry(connector, &dev->mode_config.connector_list,
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base.head) {
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@@ -7811,7 +7861,15 @@ intel_modeset_check_state(struct drm_device *dev)
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"crtc's computed enabled state doesn't match tracked enabled state "
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"(expected %i, found %i)\n", enabled, crtc->base.enabled);
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- assert_pipe(dev->dev_private, crtc->pipe, crtc->active);
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+ active = dev_priv->display.get_pipe_config(crtc,
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+ &pipe_config);
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+ WARN(crtc->active != active,
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+ "crtc active state doesn't match with hw state "
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+ "(expected %i, found %i)\n", crtc->active, active);
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+
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+ WARN(active &&
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+ !intel_pipe_config_compare(&crtc->config, &pipe_config),
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+ "pipe state doesn't match!\n");
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}
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}
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@@ -8617,18 +8675,21 @@ static void intel_init_display(struct drm_device *dev)
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (HAS_DDI(dev)) {
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+ dev_priv->display.get_pipe_config = haswell_get_pipe_config;
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dev_priv->display.crtc_mode_set = haswell_crtc_mode_set;
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dev_priv->display.crtc_enable = haswell_crtc_enable;
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dev_priv->display.crtc_disable = haswell_crtc_disable;
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dev_priv->display.off = haswell_crtc_off;
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dev_priv->display.update_plane = ironlake_update_plane;
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} else if (HAS_PCH_SPLIT(dev)) {
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+ dev_priv->display.get_pipe_config = ironlake_get_pipe_config;
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dev_priv->display.crtc_mode_set = ironlake_crtc_mode_set;
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dev_priv->display.crtc_enable = ironlake_crtc_enable;
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dev_priv->display.crtc_disable = ironlake_crtc_disable;
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dev_priv->display.off = ironlake_crtc_off;
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dev_priv->display.update_plane = ironlake_update_plane;
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} else {
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+ dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
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dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set;
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dev_priv->display.crtc_enable = i9xx_crtc_enable;
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dev_priv->display.crtc_disable = i9xx_crtc_disable;
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@@ -9163,14 +9224,10 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
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}
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setup_pipes:
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- for_each_pipe(pipe) {
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- crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
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-
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- tmp = I915_READ(PIPECONF(crtc->cpu_transcoder));
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- if (tmp & PIPECONF_ENABLE)
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- crtc->active = true;
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- else
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- crtc->active = false;
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+ list_for_each_entry(crtc, &dev->mode_config.crtc_list,
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+ base.head) {
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+ crtc->active = dev_priv->display.get_pipe_config(crtc,
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+ &crtc->config);
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crtc->base.enabled = crtc->active;
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