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@@ -85,30 +85,29 @@ int s6_gpio_init(u32 afsel)
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return gpiochip_add(&gpiochip);
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}
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-static void ack(unsigned int irq)
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+static void ack(struct irq_data *d)
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{
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- writeb(1 << (irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC);
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+ writeb(1 << (d->irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC);
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}
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-static void mask(unsigned int irq)
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+static void mask(struct irq_data *d)
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{
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u8 r = readb(S6_REG_GPIO + S6_GPIO_IE);
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- r &= ~(1 << (irq - IRQ_BASE));
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+ r &= ~(1 << (d->irq - IRQ_BASE));
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writeb(r, S6_REG_GPIO + S6_GPIO_IE);
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}
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-static void unmask(unsigned int irq)
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+static void unmask(struct irq_data *d)
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{
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u8 m = readb(S6_REG_GPIO + S6_GPIO_IE);
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- m |= 1 << (irq - IRQ_BASE);
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+ m |= 1 << (d->irq - IRQ_BASE);
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writeb(m, S6_REG_GPIO + S6_GPIO_IE);
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}
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-static int set_type(unsigned int irq, unsigned int type)
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+static int set_type(struct irq_data *d, unsigned int type)
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{
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- const u8 m = 1 << (irq - IRQ_BASE);
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+ const u8 m = 1 << (d->irq - IRQ_BASE);
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irq_flow_handler_t handler;
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- struct irq_desc *desc;
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u8 reg;
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if (type == IRQ_TYPE_PROBE) {
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@@ -129,8 +128,7 @@ static int set_type(unsigned int irq, unsigned int type)
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handler = handle_edge_irq;
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}
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writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS);
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- desc = irq_to_desc(irq);
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- desc->handle_irq = handler;
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+ __set_irq_handler_unlocked(irq, handler);
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reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV);
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if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING))
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@@ -150,22 +148,23 @@ static int set_type(unsigned int irq, unsigned int type)
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static struct irq_chip gpioirqs = {
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.name = "GPIO",
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- .ack = ack,
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- .mask = mask,
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- .unmask = unmask,
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- .set_type = set_type,
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+ .irq_ack = ack,
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+ .irq_mask = mask,
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+ .irq_unmask = unmask,
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+ .irq_set_type = set_type,
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};
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static u8 demux_masks[4];
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static void demux_irqs(unsigned int irq, struct irq_desc *desc)
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{
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+ struct irq_chip *chip = get_irq_desc_chip(desc);
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u8 *mask = get_irq_desc_data(desc);
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u8 pending;
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int cirq;
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- desc->chip->mask(irq);
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- desc->chip->ack(irq);
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+ chip->irq_mask(&desc->irq_data);
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+ chip->irq_ack(&desc->irq_data));
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pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask;
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cirq = IRQ_BASE - 1;
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while (pending) {
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@@ -174,7 +173,7 @@ static void demux_irqs(unsigned int irq, struct irq_desc *desc)
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pending >>= n;
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generic_handle_irq(cirq);
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}
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- desc->chip->unmask(irq);
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+ chip->irq_unmask(&desc->irq_data));
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}
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extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS];
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