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@@ -40,12 +40,17 @@ void update_mmu_cache(struct vm_area_struct * vma,
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return;
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#if defined(CONFIG_SH7705_CACHE_32KB)
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- struct page *page;
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- page = pte_page(pte);
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- if (VALID_PAGE(page) && !test_bit(PG_mapped, &page->flags)) {
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- unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
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- __flush_wback_region((void *)P1SEGADDR(phys), PAGE_SIZE);
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- __set_bit(PG_mapped, &page->flags);
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+ {
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+ struct page *page = pte_page(pte);
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+ unsigned long pfn = pte_pfn(pte);
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+
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+ if (pfn_valid(pfn) && !test_bit(PG_mapped, &page->flags)) {
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+ unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
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+
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+ __flush_wback_region((void *)P1SEGADDR(phys),
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+ PAGE_SIZE);
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+ __set_bit(PG_mapped, &page->flags);
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+ }
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}
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#endif
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@@ -80,7 +85,7 @@ void __flush_tlb_page(unsigned long asid, unsigned long page)
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*/
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addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
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data = (page & 0xfffe0000) | asid; /* VALID bit is off */
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-
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+
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if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) {
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addr |= MMU_PAGE_ASSOC_BIT;
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ways = 1; /* we already know the way .. */
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