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@@ -143,6 +143,34 @@ bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel)
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}
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EXPORT_SYMBOL(ath9k_hw_updatetxtriglevel);
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+void ath9k_hw_abort_tx_dma(struct ath_hw *ah)
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+{
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+ int i, q;
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+
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+ REG_WRITE(ah, AR_Q_TXD, AR_Q_TXD_M);
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+
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+ REG_SET_BIT(ah, AR_PCU_MISC, AR_PCU_FORCE_QUIET_COLL | AR_PCU_CLEAR_VMF);
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+ REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
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+ REG_SET_BIT(ah, AR_D_GBL_IFS_MISC, AR_D_GBL_IFS_MISC_IGNORE_BACKOFF);
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+
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+ for (q = 0; q < AR_NUM_QCU; q++) {
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+ for (i = 0; i < 1000; i++) {
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+ if (i)
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+ udelay(5);
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+
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+ if (!ath9k_hw_numtxpending(ah, q))
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+ break;
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+ }
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+ }
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+
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+ REG_CLR_BIT(ah, AR_PCU_MISC, AR_PCU_FORCE_QUIET_COLL | AR_PCU_CLEAR_VMF);
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+ REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
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+ REG_CLR_BIT(ah, AR_D_GBL_IFS_MISC, AR_D_GBL_IFS_MISC_IGNORE_BACKOFF);
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+
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+ REG_WRITE(ah, AR_Q_TXD, 0);
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+}
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+EXPORT_SYMBOL(ath9k_hw_abort_tx_dma);
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+
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bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
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{
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#define ATH9K_TX_STOP_DMA_TIMEOUT 4000 /* usec */
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