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@@ -60,8 +60,9 @@
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*/
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/* Disable the hardware event by masking its bit in its EMR */
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-static inline void disable_systemasic_irq(unsigned int irq)
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+static inline void disable_systemasic_irq(struct irq_data *data)
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{
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+ unsigned int irq = data->irq;
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__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
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__u32 mask;
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@@ -71,8 +72,9 @@ static inline void disable_systemasic_irq(unsigned int irq)
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}
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/* Enable the hardware event by setting its bit in its EMR */
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-static inline void enable_systemasic_irq(unsigned int irq)
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+static inline void enable_systemasic_irq(struct irq_data *data)
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{
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+ unsigned int irq = data->irq;
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__u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
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__u32 mask;
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@@ -82,18 +84,19 @@ static inline void enable_systemasic_irq(unsigned int irq)
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}
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/* Acknowledge a hardware event by writing its bit back to its ESR */
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-static void mask_ack_systemasic_irq(unsigned int irq)
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+static void mask_ack_systemasic_irq(struct irq_data *data)
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{
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+ unsigned int irq = data->irq;
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__u32 esr = ESR_BASE + (LEVEL(irq) << 2);
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- disable_systemasic_irq(irq);
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+ disable_systemasic_irq(data);
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outl((1 << EVENT_BIT(irq)), esr);
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}
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struct irq_chip systemasic_int = {
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.name = "System ASIC",
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- .mask = disable_systemasic_irq,
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- .mask_ack = mask_ack_systemasic_irq,
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- .unmask = enable_systemasic_irq,
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+ .irq_mask = disable_systemasic_irq,
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+ .irq_mask_ack = mask_ack_systemasic_irq,
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+ .irq_unmask = enable_systemasic_irq,
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};
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/*
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