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@@ -1747,10 +1747,11 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
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u32 srrctl;
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int queue0 = 0;
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unsigned long mask;
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+ struct ixgbe_ring_feature *feature = adapter->ring_feature;
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if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
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if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
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- int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
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+ int dcb_i = feature[RING_F_DCB].indices;
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if (dcb_i == 8)
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queue0 = index >> 4;
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else if (dcb_i == 4)
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@@ -1773,7 +1774,7 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
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queue0 = index;
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}
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} else {
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- mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
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+ mask = (unsigned long) feature[RING_F_RSS].mask;
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queue0 = index & mask;
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index = index & mask;
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}
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@@ -1804,6 +1805,36 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
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}
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+static u32 ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
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+{
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+ u32 mrqc = 0;
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+ int mask;
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+
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+ if (!(adapter->hw.mac.type == ixgbe_mac_82599EB))
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+ return mrqc;
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+
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+ mask = adapter->flags & (IXGBE_FLAG_RSS_ENABLED
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+#ifdef CONFIG_IXGBE_DCB
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+ | IXGBE_FLAG_DCB_ENABLED
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+#endif
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+ );
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+
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+ switch (mask) {
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+ case (IXGBE_FLAG_RSS_ENABLED):
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+ mrqc = IXGBE_MRQC_RSSEN;
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+ break;
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+#ifdef CONFIG_IXGBE_DCB
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+ case (IXGBE_FLAG_DCB_ENABLED):
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+ mrqc = IXGBE_MRQC_RT8TCEN;
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+ break;
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+#endif /* CONFIG_IXGBE_DCB */
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+ default:
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+ break;
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+ }
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+
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+ return mrqc;
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+}
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+
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/**
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* ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
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* @adapter: board private structure
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@@ -1877,8 +1908,10 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
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rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
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IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
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- /* Setup the HW Rx Head and Tail Descriptor Pointers and
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- * the Base and Length of the Rx Descriptor Ring */
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+ /*
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+ * Setup the HW Rx Head and Tail Descriptor Pointers and
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+ * the Base and Length of the Rx Descriptor Ring
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+ */
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for (i = 0; i < adapter->num_rx_queues; i++) {
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rdba = adapter->rx_ring[i].dma;
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j = adapter->rx_ring[i].reg_idx;
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@@ -1922,23 +1955,8 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
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}
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/* Program MRQC for the distribution of queues */
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- if (hw->mac.type == ixgbe_mac_82599EB) {
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- int mask = adapter->flags & (
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- IXGBE_FLAG_RSS_ENABLED
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- | IXGBE_FLAG_DCB_ENABLED
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- );
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+ mrqc = ixgbe_setup_mrqc(adapter);
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- switch (mask) {
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- case (IXGBE_FLAG_RSS_ENABLED):
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- mrqc = IXGBE_MRQC_RSSEN;
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- break;
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- case (IXGBE_FLAG_DCB_ENABLED):
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- mrqc = IXGBE_MRQC_RT8TCEN;
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- break;
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- default:
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- break;
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- }
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- }
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if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
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/* Fill out redirection table */
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for (i = 0, j = 0; i < 128; i++, j++) {
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@@ -2842,17 +2860,15 @@ static void ixgbe_reset_task(struct work_struct *work)
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static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
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{
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bool ret = false;
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+ struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_DCB];
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- if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
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- adapter->ring_feature[RING_F_DCB].mask = 0x7 << 3;
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- adapter->num_rx_queues =
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- adapter->ring_feature[RING_F_DCB].indices;
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- adapter->num_tx_queues =
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- adapter->ring_feature[RING_F_DCB].indices;
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- ret = true;
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- } else {
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- ret = false;
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- }
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+ if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
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+ return ret;
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+
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+ f->mask = 0x7 << 3;
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+ adapter->num_rx_queues = f->indices;
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+ adapter->num_tx_queues = f->indices;
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+ ret = true;
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return ret;
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}
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@@ -2869,13 +2885,12 @@ static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
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static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
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{
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bool ret = false;
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+ struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_RSS];
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if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
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- adapter->ring_feature[RING_F_RSS].mask = 0xF;
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- adapter->num_rx_queues =
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- adapter->ring_feature[RING_F_RSS].indices;
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- adapter->num_tx_queues =
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- adapter->ring_feature[RING_F_RSS].indices;
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+ f->mask = 0xF;
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+ adapter->num_rx_queues = f->indices;
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+ adapter->num_tx_queues = f->indices;
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ret = true;
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} else {
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ret = false;
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