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+/*
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+ * tps51632-regulator.c -- TI TPS51632
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+ *
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+ * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless
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+ * Controller with serial VID control and DVFS.
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+ *
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+ * Copyright (c) 2012, NVIDIA Corporation.
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+ *
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+ * Author: Laxman Dewangan <ldewangan@nvidia.com>
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation version 2.
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+ *
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+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
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+ * whether express or implied; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ * General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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+ * 02111-1307, USA
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+ */
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+
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+#include <linux/err.h>
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+#include <linux/i2c.h>
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/regmap.h>
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+#include <linux/regulator/driver.h>
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+#include <linux/regulator/machine.h>
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+#include <linux/regulator/tps51632-regulator.h>
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+#include <linux/slab.h>
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+
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+/* Register definitions */
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+#define TPS51632_VOLTAGE_SELECT_REG 0x0
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+#define TPS51632_VOLTAGE_BASE_REG 0x1
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+#define TPS51632_OFFSET_REG 0x2
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+#define TPS51632_IMON_REG 0x3
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+#define TPS51632_VMAX_REG 0x4
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+#define TPS51632_DVFS_CONTROL_REG 0x5
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+#define TPS51632_POWER_STATE_REG 0x6
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+#define TPS51632_SLEW_REGS 0x7
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+#define TPS51632_FAULT_REG 0x14
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+
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+#define TPS51632_MAX_REG 0x15
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+
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+#define TPS51632_VOUT_MASK 0x7F
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+#define TPS51632_VOUT_OFFSET_MASK 0x1F
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+#define TPS51632_VMAX_MASK 0x7F
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+#define TPS51632_VMAX_LOCK 0x80
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+
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+/* TPS51632_DVFS_CONTROL_REG */
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+#define TPS51632_DVFS_PWMEN 0x1
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+#define TPS51632_DVFS_STEP_20 0x2
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+#define TPS51632_DVFS_VMAX_PG 0x4
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+#define TPS51632_DVFS_PWMRST 0x8
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+#define TPS51632_DVFS_OCA_EN 0x10
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+#define TPS51632_DVFS_FCCM 0x20
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+
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+/* TPS51632_POWER_STATE_REG */
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+#define TPS51632_POWER_STATE_MASK 0x03
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+#define TPS51632_POWER_STATE_MULTI_PHASE_CCM 0x0
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+#define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x1
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+#define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x2
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+
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+#define TPS51632_MIN_VOLATGE 500000
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+#define TPS51632_MAX_VOLATGE 1520000
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+#define TPS51632_VOLATGE_STEP_10mV 10000
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+#define TPS51632_VOLATGE_STEP_20mV 20000
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+#define TPS51632_MAX_VSEL 0x7F
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+#define TPS51632_MIN_VSEL 0x19
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+#define TPS51632_DEFAULT_RAMP_DELAY 6000
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+#define TPS51632_VOLT_VSEL(uV) \
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+ (DIV_ROUND_UP(uV - TPS51632_MIN_VOLATGE, \
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+ TPS51632_VOLATGE_STEP_10mV) + \
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+ TPS51632_MIN_VSEL)
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+
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+/* TPS51632 chip information */
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+struct tps51632_chip {
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+ struct device *dev;
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+ struct regulator_desc desc;
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+ struct regulator_dev *rdev;
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+ struct regmap *regmap;
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+ bool enable_pwm_dvfs;
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+};
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+
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+static int tps51632_dcdc_get_voltage_sel(struct regulator_dev *rdev)
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+{
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+ struct tps51632_chip *tps = rdev_get_drvdata(rdev);
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+ unsigned int data;
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+ int ret;
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+ unsigned int reg = TPS51632_VOLTAGE_SELECT_REG;
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+ int vsel;
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+
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+ if (tps->enable_pwm_dvfs)
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+ reg = TPS51632_VOLTAGE_BASE_REG;
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+
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+ ret = regmap_read(tps->regmap, reg, &data);
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+ if (ret < 0) {
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+ dev_err(tps->dev, "reg read failed, err %d\n", ret);
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+ return ret;
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+ }
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+
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+ vsel = data & TPS51632_VOUT_MASK;
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+
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+ if (vsel < TPS51632_MIN_VSEL)
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+ return 0;
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+ else
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+ return vsel - TPS51632_MIN_VSEL;
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+}
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+
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+static int tps51632_dcdc_set_voltage_sel(struct regulator_dev *rdev,
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+ unsigned selector)
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+{
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+ struct tps51632_chip *tps = rdev_get_drvdata(rdev);
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+ int vsel;
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+ int ret;
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+ unsigned int reg = TPS51632_VOLTAGE_SELECT_REG;
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+
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+ if (tps->enable_pwm_dvfs)
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+ reg = TPS51632_VOLTAGE_BASE_REG;
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+
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+ vsel = selector + TPS51632_MIN_VSEL;
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+ if (vsel > TPS51632_MAX_VSEL)
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+ return -EINVAL;
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+
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+ ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_SELECT_REG, vsel);
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+ if (ret < 0)
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+ dev_err(tps->dev, "reg write failed, err %d\n", ret);
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+ return ret;
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+}
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+
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+static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev,
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+ int ramp_delay)
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+{
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+ struct tps51632_chip *tps = rdev_get_drvdata(rdev);
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+ int bit = ramp_delay/6000;
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+ int ret;
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+
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+ if (bit)
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+ bit--;
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+ ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
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+ if (ret < 0)
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+ dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);
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+ return ret;
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+}
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+
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+static struct regulator_ops tps51632_dcdc_ops = {
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+ .get_voltage_sel = tps51632_dcdc_get_voltage_sel,
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+ .set_voltage_sel = tps51632_dcdc_set_voltage_sel,
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+ .list_voltage = regulator_list_voltage_linear,
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+ .set_voltage_time_sel = regulator_set_voltage_time_sel,
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+ .set_ramp_delay = tps51632_dcdc_set_ramp_delay,
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+};
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+
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+static int __devinit tps51632_init_dcdc(struct tps51632_chip *tps,
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+ struct tps51632_regulator_platform_data *pdata)
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+{
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+ int ret;
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+ uint8_t control = 0;
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+ int vsel;
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+
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+ if (!pdata->enable_pwm_dvfs)
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+ goto skip_pwm_config;
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+
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+ control |= TPS51632_DVFS_PWMEN;
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+ tps->enable_pwm_dvfs = pdata->enable_pwm_dvfs;
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+ vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV);
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+ ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel);
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+ if (ret < 0) {
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+ dev_err(tps->dev, "BASE reg write failed, err %d\n", ret);
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+ return ret;
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+ }
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+
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+ if (pdata->dvfs_step_20mV)
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+ control |= TPS51632_DVFS_STEP_20;
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+
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+ if (pdata->max_voltage_uV) {
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+ unsigned int vmax;
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+ /**
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+ * TPS51632 hw behavior: VMAX register can be write only
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+ * once as it get locked after first write. The lock get
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+ * reset only when device is power-reset.
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+ * Write register only when lock bit is not enabled.
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+ */
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+ ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax);
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+ if (ret < 0) {
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+ dev_err(tps->dev, "VMAX read failed, err %d\n", ret);
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+ return ret;
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+ }
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+ if (!(vmax & TPS51632_VMAX_LOCK)) {
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+ vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV);
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+ ret = regmap_write(tps->regmap, TPS51632_VMAX_REG,
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+ vsel);
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+ if (ret < 0) {
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+ dev_err(tps->dev,
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+ "VMAX write failed, err %d\n", ret);
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+ return ret;
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+ }
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+ }
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+ }
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+
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+skip_pwm_config:
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+ ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control);
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+ if (ret < 0)
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+ dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret);
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+ return ret;
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+}
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+
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+static bool rd_wr_reg(struct device *dev, unsigned int reg)
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+{
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+ if ((reg >= 0x8) && (reg <= 0x10))
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+ return false;
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+ return true;
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+}
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+
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+static const struct regmap_config tps51632_regmap_config = {
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+ .reg_bits = 8,
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+ .val_bits = 8,
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+ .writeable_reg = rd_wr_reg,
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+ .readable_reg = rd_wr_reg,
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+ .max_register = TPS51632_MAX_REG - 1,
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+ .cache_type = REGCACHE_RBTREE,
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+};
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+
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+static int __devinit tps51632_probe(struct i2c_client *client,
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+ const struct i2c_device_id *id)
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+{
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+ struct tps51632_regulator_platform_data *pdata;
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+ struct regulator_dev *rdev;
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+ struct tps51632_chip *tps;
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+ int ret;
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+ struct regulator_config config = { };
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+
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+ pdata = client->dev.platform_data;
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+ if (!pdata) {
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+ dev_err(&client->dev, "No Platform data\n");
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+ return -EINVAL;
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+ }
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+
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+ tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
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+ if (!tps) {
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+ dev_err(&client->dev, "Memory allocation failed\n");
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+ return -ENOMEM;
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+ }
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+
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+ tps->dev = &client->dev;
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+ tps->desc.name = id->name;
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+ tps->desc.id = 0;
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+ tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY;
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+ tps->desc.min_uV = TPS51632_MIN_VOLATGE;
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+ tps->desc.uV_step = TPS51632_VOLATGE_STEP_10mV;
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+ tps->desc.n_voltages = (TPS51632_MAX_VSEL - TPS51632_MIN_VSEL) + 1;
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+ tps->desc.ops = &tps51632_dcdc_ops;
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+ tps->desc.type = REGULATOR_VOLTAGE;
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+ tps->desc.owner = THIS_MODULE;
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+
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+ tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config);
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+ if (IS_ERR(tps->regmap)) {
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+ ret = PTR_ERR(tps->regmap);
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+ dev_err(&client->dev, "regmap init failed, err %d\n", ret);
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+ return ret;
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+ }
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+ i2c_set_clientdata(client, tps);
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+
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+ ret = tps51632_init_dcdc(tps, pdata);
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+ if (ret < 0) {
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+ dev_err(tps->dev, "Init failed, err = %d\n", ret);
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+ return ret;
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+ }
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+
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+ /* Register the regulators */
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+ config.dev = &client->dev;
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+ config.init_data = pdata->reg_init_data;
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+ config.driver_data = tps;
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+ config.regmap = tps->regmap;
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+ config.of_node = client->dev.of_node;
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+
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+ rdev = regulator_register(&tps->desc, &config);
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+ if (IS_ERR(rdev)) {
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+ dev_err(tps->dev, "regulator register failed\n");
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+ return PTR_ERR(rdev);
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+ }
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+
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+ tps->rdev = rdev;
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+ return 0;
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+}
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+
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+static int __devexit tps51632_remove(struct i2c_client *client)
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+{
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+ struct tps51632_chip *tps = i2c_get_clientdata(client);
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+
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+ regulator_unregister(tps->rdev);
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+ return 0;
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+}
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+
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+static const struct i2c_device_id tps51632_id[] = {
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+ {.name = "tps51632",},
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+ {},
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+};
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+
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+MODULE_DEVICE_TABLE(i2c, tps51632_id);
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+
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+static struct i2c_driver tps51632_i2c_driver = {
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+ .driver = {
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+ .name = "tps51632",
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = tps51632_probe,
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+ .remove = __devexit_p(tps51632_remove),
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+ .id_table = tps51632_id,
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+};
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+
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+static int __init tps51632_init(void)
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+{
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+ return i2c_add_driver(&tps51632_i2c_driver);
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+}
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+subsys_initcall(tps51632_init);
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+
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+static void __exit tps51632_cleanup(void)
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+{
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+ i2c_del_driver(&tps51632_i2c_driver);
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+}
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+module_exit(tps51632_cleanup);
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+
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+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
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+MODULE_DESCRIPTION("TPS51632 voltage regulator driver");
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+MODULE_LICENSE("GPL v2");
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