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+/**
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+ * drivers/gpio/max7301.c
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+ *
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+ * Copyright (C) 2006 Juergen Beisert, Pengutronix
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+ * Copyright (C) 2008 Guennadi Liakhovetski, Pengutronix
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ * The Maxim's MAX7301 device is an SPI driven GPIO expander. There are
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+ * 28 GPIOs. 8 of them can trigger an interrupt. See datasheet for more
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+ * details
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+ * Note:
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+ * - DIN must be stable at the rising edge of clock.
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+ * - when writing:
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+ * - always clock in 16 clocks at once
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+ * - at DIN: D15 first, D0 last
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+ * - D0..D7 = databyte, D8..D14 = commandbyte
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+ * - D15 = low -> write command
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+ * - when reading
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+ * - always clock in 16 clocks at once
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+ * - at DIN: D15 first, D0 last
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+ * - D0..D7 = dummy, D8..D14 = register address
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+ * - D15 = high -> read command
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+ * - raise CS and assert it again
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+ * - always clock in 16 clocks at once
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+ * - at DOUT: D15 first, D0 last
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+ * - D0..D7 contains the data from the first cycle
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+ *
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+ * The driver exports a standard gpiochip interface
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/mutex.h>
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+#include <linux/spi/spi.h>
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+#include <linux/spi/max7301.h>
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+#include <linux/gpio.h>
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+
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+#define DRIVER_NAME "max7301"
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+
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+/*
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+ * Pin configurations, see MAX7301 datasheet page 6
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+ */
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+#define PIN_CONFIG_MASK 0x03
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+#define PIN_CONFIG_IN_PULLUP 0x03
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+#define PIN_CONFIG_IN_WO_PULLUP 0x02
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+#define PIN_CONFIG_OUT 0x01
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+
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+#define PIN_NUMBER 28
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+
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+
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+/*
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+ * Some registers must be read back to modify.
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+ * To save time we cache them here in memory
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+ */
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+struct max7301 {
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+ struct mutex lock;
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+ u8 port_config[8]; /* field 0 is unused */
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+ u32 out_level; /* cached output levels */
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+ struct gpio_chip chip;
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+ struct spi_device *spi;
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+};
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+
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+/**
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+ * max7301_write - Write a new register content
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+ * @spi: The SPI device
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+ * @reg: Register offset
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+ * @val: Value to write
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+ *
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+ * A write to the MAX7301 means one message with one transfer
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+ *
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+ * Returns 0 if successful or a negative value on error
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+ */
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+static int max7301_write(struct spi_device *spi, unsigned int reg, unsigned int val)
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+{
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+ u16 word = ((reg & 0x7F) << 8) | (val & 0xFF);
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+ return spi_write(spi, (const u8 *)&word, sizeof(word));
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+}
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+
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+/**
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+ * max7301_read - Read back register content
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+ * @spi: The SPI device
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+ * @reg: Register offset
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+ *
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+ * A read from the MAX7301 means two transfers; here, one message each
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+ *
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+ * Returns positive 8 bit value from device if successful or a
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+ * negative value on error
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+ */
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+static int max7301_read(struct spi_device *spi, unsigned int reg)
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+{
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+ int ret;
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+ u16 word;
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+
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+ word = 0x8000 | (reg << 8);
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+ ret = spi_write(spi, (const u8 *)&word, sizeof(word));
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+ if (ret)
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+ return ret;
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+ /*
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+ * This relies on the fact, that a transfer with NULL tx_buf shifts out
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+ * zero bytes (=NOOP for MAX7301)
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+ */
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+ ret = spi_read(spi, (u8 *)&word, sizeof(word));
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+ if (ret)
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+ return ret;
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+ return word & 0xff;
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+}
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+
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+static int max7301_direction_input(struct gpio_chip *chip, unsigned offset)
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+{
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+ struct max7301 *ts = container_of(chip, struct max7301, chip);
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+ u8 *config;
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+ int ret;
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+
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+ /* First 4 pins are unused in the controller */
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+ offset += 4;
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+
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+ config = &ts->port_config[offset >> 2];
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+
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+ mutex_lock(&ts->lock);
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+
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+ /* Standard GPIO API doesn't support pull-ups, has to be extended.
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+ * Hard-coding no pollup for now. */
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+ *config = (*config & ~(3 << (offset & 3))) | (1 << (offset & 3));
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+
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+ ret = max7301_write(ts->spi, 0x08 + (offset >> 2), *config);
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+
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+ mutex_unlock(&ts->lock);
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+
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+ return ret;
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+}
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+
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+static int __max7301_set(struct max7301 *ts, unsigned offset, int value)
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+{
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+ if (value) {
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+ ts->out_level |= 1 << offset;
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+ return max7301_write(ts->spi, 0x20 + offset, 0x01);
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+ } else {
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+ ts->out_level &= ~(1 << offset);
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+ return max7301_write(ts->spi, 0x20 + offset, 0x00);
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+ }
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+}
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+
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+static int max7301_direction_output(struct gpio_chip *chip, unsigned offset,
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+ int value)
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+{
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+ struct max7301 *ts = container_of(chip, struct max7301, chip);
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+ u8 *config;
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+ int ret;
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+
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+ /* First 4 pins are unused in the controller */
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+ offset += 4;
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+
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+ config = &ts->port_config[offset >> 2];
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+
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+ mutex_lock(&ts->lock);
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+
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+ *config = (*config & ~(3 << (offset & 3))) | (1 << (offset & 3));
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+
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+ ret = __max7301_set(ts, offset, value);
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+
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+ if (!ret)
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+ ret = max7301_write(ts->spi, 0x08 + (offset >> 2), *config);
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+
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+ mutex_unlock(&ts->lock);
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+
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+ return ret;
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+}
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+
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+static int max7301_get(struct gpio_chip *chip, unsigned offset)
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+{
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+ struct max7301 *ts = container_of(chip, struct max7301, chip);
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+ int config, level = -EINVAL;
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+
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+ /* First 4 pins are unused in the controller */
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+ offset += 4;
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+
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+ mutex_lock(&ts->lock);
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+
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+ config = (ts->port_config[offset >> 2] >> ((offset & 3) * 2)) & 3;
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+
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+ switch (config) {
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+ case 1:
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+ /* Output: return cached level */
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+ level = !!(ts->out_level & (1 << offset));
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+ break;
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+ case 2:
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+ case 3:
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+ /* Input: read out */
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+ level = max7301_read(ts->spi, 0x20 + offset) & 0x01;
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+ }
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+ mutex_unlock(&ts->lock);
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+
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+ return level;
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+}
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+
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+static void max7301_set(struct gpio_chip *chip, unsigned offset, int value)
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+{
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+ struct max7301 *ts = container_of(chip, struct max7301, chip);
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+
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+ /* First 4 pins are unused in the controller */
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+ offset += 4;
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+
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+ mutex_lock(&ts->lock);
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+
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+ __max7301_set(ts, offset, value);
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+
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+ mutex_unlock(&ts->lock);
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+}
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+
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+static int __devinit max7301_probe(struct spi_device *spi)
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+{
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+ struct max7301 *ts;
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+ struct max7301_platform_data *pdata;
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+ int i, ret;
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+
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+ pdata = spi->dev.platform_data;
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+ if (!pdata || !pdata->base)
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+ return -ENODEV;
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+
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+ /*
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+ * bits_per_word cannot be configured in platform data
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+ */
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+ spi->bits_per_word = 16;
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+
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+ ret = spi_setup(spi);
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+ if (ret < 0)
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+ return ret;
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+
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+ ts = kzalloc(sizeof(struct max7301), GFP_KERNEL);
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+ if (!ts)
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+ return -ENOMEM;
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+
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+ mutex_init(&ts->lock);
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+
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+ dev_set_drvdata(&spi->dev, ts);
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+
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+ /* Power up the chip and disable IRQ output */
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+ max7301_write(spi, 0x04, 0x01);
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+
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+ ts->spi = spi;
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+
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+ ts->chip.label = DRIVER_NAME,
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+
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+ ts->chip.direction_input = max7301_direction_input;
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+ ts->chip.get = max7301_get;
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+ ts->chip.direction_output = max7301_direction_output;
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+ ts->chip.set = max7301_set;
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+
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+ ts->chip.base = pdata->base;
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+ ts->chip.ngpio = PIN_NUMBER;
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+ ts->chip.can_sleep = 1;
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+ ts->chip.dev = &spi->dev;
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+ ts->chip.owner = THIS_MODULE;
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+
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+ ret = gpiochip_add(&ts->chip);
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+ if (ret)
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+ goto exit_destroy;
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+
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+ /*
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+ * tristate all pins in hardware and cache the
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+ * register values for later use.
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+ */
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+ for (i = 1; i < 8; i++) {
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+ int j;
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+ /* 0xAA means input with internal pullup disabled */
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+ max7301_write(spi, 0x08 + i, 0xAA);
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+ ts->port_config[i] = 0xAA;
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+ for (j = 0; j < 4; j++) {
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+ int idx = ts->chip.base + (i - 1) * 4 + j;
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+ ret = gpio_direction_input(idx);
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+ if (ret)
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+ goto exit_remove;
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+ gpio_free(idx);
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+ }
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+ }
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+ return ret;
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+
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+exit_remove:
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+ gpiochip_remove(&ts->chip);
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+exit_destroy:
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+ dev_set_drvdata(&spi->dev, NULL);
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+ mutex_destroy(&ts->lock);
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+ kfree(ts);
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+ return ret;
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+}
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+
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+static int max7301_remove(struct spi_device *spi)
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+{
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+ struct max7301 *ts;
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+ int ret;
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+
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+ ts = dev_get_drvdata(&spi->dev);
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+ if (ts == NULL)
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+ return -ENODEV;
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+
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+ dev_set_drvdata(&spi->dev, NULL);
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+
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+ /* Power down the chip and disable IRQ output */
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+ max7301_write(spi, 0x04, 0x00);
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+
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+ ret = gpiochip_remove(&ts->chip);
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+ if (!ret) {
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+ mutex_destroy(&ts->lock);
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+ kfree(ts);
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+ } else
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+ dev_err(&spi->dev, "Failed to remove the GPIO controller: %d\n",
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+ ret);
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+
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+ return ret;
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+}
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+
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+static struct spi_driver max7301_driver = {
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+ .driver = {
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+ .name = DRIVER_NAME,
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = max7301_probe,
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+ .remove = __devexit_p(max7301_remove),
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+};
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+
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+static int __init max7301_init(void)
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+{
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+ return spi_register_driver(&max7301_driver);
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+}
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+
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+static void __exit max7301_exit(void)
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+{
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+ spi_unregister_driver(&max7301_driver);
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+}
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+
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+module_init(max7301_init);
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+module_exit(max7301_exit);
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+
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+MODULE_AUTHOR("Juergen Beisert");
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+MODULE_LICENSE("GPL v2");
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+MODULE_DESCRIPTION("MAX7301 SPI based GPIO-Expander");
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