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@@ -43,8 +43,10 @@ static u8 intc_intpri = MCFSIM_ICR_LEVEL(6) | MCFSIM_ICR_PRI(6);
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#define NR_VECS 64
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#endif
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-static void intc_irq_mask(unsigned int irq)
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+static void intc_irq_mask(struct irq_data *d)
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{
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+ unsigned int irq = d->irq;
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+
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if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + NR_VECS)) {
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unsigned long imraddr;
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u32 val, imrbit;
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@@ -64,8 +66,10 @@ static void intc_irq_mask(unsigned int irq)
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}
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}
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-static void intc_irq_unmask(unsigned int irq)
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+static void intc_irq_unmask(struct irq_data *d)
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{
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+ unsigned int irq = d->irq;
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+
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if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + NR_VECS)) {
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unsigned long intaddr, imraddr, icraddr;
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u32 val, imrbit;
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@@ -93,16 +97,16 @@ static void intc_irq_unmask(unsigned int irq)
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}
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}
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-static int intc_irq_set_type(unsigned int irq, unsigned int type)
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+static int intc_irq_set_type(struct irq_data *d, unsigned int type)
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{
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return 0;
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}
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static struct irq_chip intc_irq_chip = {
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.name = "CF-INTC",
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- .mask = intc_irq_mask,
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- .unmask = intc_irq_unmask,
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- .set_type = intc_irq_set_type,
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+ .irq_mask = intc_irq_mask,
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+ .irq_unmask = intc_irq_unmask,
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+ .irq_set_type = intc_irq_set_type,
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};
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void __init init_IRQ(void)
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