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@@ -60,6 +60,57 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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vma->vm_page_prot);
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}
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+static void __iomem *ioport_map_pci(struct pci_dev *dev,
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+ unsigned long port, unsigned int nr)
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+{
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+ struct pci_channel *chan = dev->sysdata;
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+
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+ if (!chan->io_map_base)
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+ chan->io_map_base = generic_io_base;
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+
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+ return (void __iomem *)(chan->io_map_base + port);
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+}
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+
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+void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
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+{
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+ resource_size_t start = pci_resource_start(dev, bar);
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+ resource_size_t len = pci_resource_len(dev, bar);
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+ unsigned long flags = pci_resource_flags(dev, bar);
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+
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+ if (unlikely(!len || !start))
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+ return NULL;
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+ if (maxlen && len > maxlen)
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+ len = maxlen;
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+
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+ if (flags & IORESOURCE_IO)
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+ return ioport_map_pci(dev, start, len);
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+
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+ /*
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+ * Presently the IORESOURCE_MEM case is a bit special, most
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+ * SH7751 style PCI controllers have PCI memory at a fixed
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+ * location in the address space where no remapping is desired.
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+ * With the IORESOURCE_MEM case more care has to be taken
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+ * to inhibit page table mapping for legacy cores, but this is
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+ * punted off to __ioremap().
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+ * -- PFM.
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+ */
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+ if (flags & IORESOURCE_MEM) {
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+ if (flags & IORESOURCE_CACHEABLE)
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+ return ioremap(start, len);
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+
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+ return ioremap_nocache(start, len);
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+ }
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+
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+ return NULL;
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+}
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+EXPORT_SYMBOL(pci_iomap);
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+
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+void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
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+{
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+ iounmap(addr);
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+}
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+EXPORT_SYMBOL(pci_iounmap);
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+
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#ifdef CONFIG_HOTPLUG
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EXPORT_SYMBOL(pcibios_resource_to_bus);
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EXPORT_SYMBOL(pcibios_bus_to_resource);
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