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@@ -6,264 +6,134 @@
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*
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* Copyright 2005 MontaVista Software Inc.
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*
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+ * Heavily modified by Scott Wood <scottwood@freescale.com>
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+ * Copyright 2007 Freescale Semiconductor, Inc.
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+ *
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/init.h>
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-#include <linux/module.h>
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-#include <linux/param.h>
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-#include <linux/string.h>
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-#include <linux/ioport.h>
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-#include <linux/device.h>
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-#include <linux/delay.h>
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-#include <linux/root_dev.h>
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-
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-#include <linux/fs_enet_pd.h>
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-#include <linux/fs_uart_pd.h>
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-#include <linux/mii.h>
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+#include <linux/of_platform.h>
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-#include <asm/delay.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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-#include <asm/page.h>
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-#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/mpc8xx.h>
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#include <asm/8xx_immap.h>
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#include <asm/commproc.h>
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#include <asm/fs_pd.h>
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-#include <asm/prom.h>
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+#include <asm/udbg.h>
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#include <sysdev/commproc.h>
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-static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi);
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-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi);
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-static void init_scc1_ioports(struct fs_platform_info* ptr);
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-
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-void __init mpc86xads_board_setup(void)
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-{
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- cpm8xx_t *cp;
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- unsigned int *bcsr_io;
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- u8 tmpval8;
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-
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- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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- cp = (cpm8xx_t *)immr_map(im_cpm);
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-
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- if (bcsr_io == NULL) {
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- printk(KERN_CRIT "Could not remap BCSR\n");
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- return;
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- }
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-#ifdef CONFIG_SERIAL_CPM_SMC1
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- clrbits32(bcsr_io, BCSR1_RS232EN_1);
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- clrbits32(&cp->cp_simode, 0xe0000000 >> 17); /* brg1 */
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- tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX | SMCM_TX);
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- out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
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- clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN);
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-#else
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- setbits32(bcsr_io,BCSR1_RS232EN_1);
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- out_be16(&cp->cp_smc[0].smc_smcmr, 0);
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- out_8(&cp->cp_smc[0].smc_smce, 0);
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-#endif
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-
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-#ifdef CONFIG_SERIAL_CPM_SMC2
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- clrbits32(bcsr_io,BCSR1_RS232EN_2);
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- clrbits32(&cp->cp_simode, 0xe0000000 >> 1);
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- setbits32(&cp->cp_simode, 0x20000000 >> 1); /* brg2 */
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- tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX);
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- out_8(&(cp->cp_smc[1].smc_smcm), tmpval8);
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- clrbits16(&cp->cp_smc[1].smc_smcmr, SMCMR_REN | SMCMR_TEN);
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+#include "mpc86xads.h"
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- init_smc2_uart_ioports(0);
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-#else
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- setbits32(bcsr_io,BCSR1_RS232EN_2);
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- out_be16(&cp->cp_smc[1].smc_smcmr, 0);
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- out_8(&cp->cp_smc[1].smc_smce, 0);
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-#endif
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- immr_unmap(cp);
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- iounmap(bcsr_io);
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-}
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+struct cpm_pin {
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+ int port, pin, flags;
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+};
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+static struct cpm_pin mpc866ads_pins[] = {
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+ /* SMC1 */
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+ {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
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+ {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
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+
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+ /* SMC2 */
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+ {CPM_PORTB, 21, CPM_PIN_INPUT}, /* RX */
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+ {CPM_PORTB, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
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+
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+ /* SCC1 */
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+ {CPM_PORTA, 6, CPM_PIN_INPUT}, /* CLK1 */
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+ {CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */
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+ {CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */
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+ {CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */
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+ {CPM_PORTB, 19, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
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+ {CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */
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+ {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */
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+
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+ /* MII */
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+ {CPM_PORTD, 3, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 4, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 5, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 6, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 7, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 8, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 9, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 10, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 11, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 12, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 13, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 14, CPM_PIN_OUTPUT},
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+ {CPM_PORTD, 15, CPM_PIN_OUTPUT},
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+};
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-static void init_fec1_ioports(struct fs_platform_info* ptr)
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+static void __init init_ioports(void)
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{
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- iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
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+ int i;
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- /* configure FEC1 pins */
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+ for (i = 0; i < ARRAY_SIZE(mpc866ads_pins); i++) {
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+ struct cpm_pin *pin = &mpc866ads_pins[i];
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+ cpm1_set_pin(pin->port, pin->pin, pin->flags);
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+ }
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- setbits16(&io_port->iop_pdpar, 0x1fff);
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- setbits16(&io_port->iop_pddir, 0x1fff);
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+ cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
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+ cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX);
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+ cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK1, CPM_CLK_TX);
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+ cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
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- immr_unmap(io_port);
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+ /* Set FEC1 and FEC2 to MII mode */
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+ clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
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}
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-void init_fec_ioports(struct fs_platform_info *fpi)
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+static void __init mpc86xads_setup_arch(void)
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{
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- int fec_no = fs_get_fec_index(fpi->fs_no);
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+ struct device_node *np;
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+ u32 __iomem *bcsr_io;
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+
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+ cpm_reset();
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+ init_ioports();
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- switch (fec_no) {
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- case 0:
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- init_fec1_ioports(fpi);
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- break;
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- default:
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- printk(KERN_ERR "init_fec_ioports: invalid FEC number\n");
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+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc866ads-bcsr");
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+ if (!np) {
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+ printk(KERN_CRIT "Could not find fsl,mpc866ads-bcsr node\n");
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return;
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}
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-}
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-static void init_scc1_ioports(struct fs_platform_info* fpi)
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-{
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- unsigned *bcsr_io;
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- iop8xx_t *io_port;
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- cpm8xx_t *cp;
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-
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- bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
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- io_port = (iop8xx_t *)immr_map(im_ioport);
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- cp = (cpm8xx_t *)immr_map(im_cpm);
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+ bcsr_io = of_iomap(np, 0);
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+ of_node_put(np);
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if (bcsr_io == NULL) {
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printk(KERN_CRIT "Could not remap BCSR\n");
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return;
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}
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- /* Configure port A pins for Txd and Rxd.
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- */
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- setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD);
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- clrbits16(&io_port->iop_padir, PA_ENET_RXD | PA_ENET_TXD);
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- clrbits16(&io_port->iop_paodr, PA_ENET_TXD);
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-
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- /* Configure port C pins to enable CLSN and RENA.
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- */
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- clrbits16(&io_port->iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
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- clrbits16(&io_port->iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
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- setbits16(&io_port->iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
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-
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- /* Configure port A for TCLK and RCLK.
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- */
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- setbits16(&io_port->iop_papar, PA_ENET_TCLK | PA_ENET_RCLK);
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- clrbits16(&io_port->iop_padir, PA_ENET_TCLK | PA_ENET_RCLK);
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- clrbits32(&cp->cp_pbpar, PB_ENET_TENA);
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- clrbits32(&cp->cp_pbdir, PB_ENET_TENA);
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-
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- /* Configure Serial Interface clock routing.
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- * First, clear all SCC bits to zero, then set the ones we want.
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- */
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- clrbits32(&cp->cp_sicr, SICR_ENET_MASK);
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- setbits32(&cp->cp_sicr, SICR_ENET_CLKRT);
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-
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- /* In the original SCC enet driver the following code is placed at
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- the end of the initialization */
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- setbits32(&cp->cp_pbpar, PB_ENET_TENA);
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- setbits32(&cp->cp_pbdir, PB_ENET_TENA);
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-
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- clrbits32(bcsr_io+1, BCSR1_ETHEN);
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+ clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN);
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iounmap(bcsr_io);
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- immr_unmap(cp);
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- immr_unmap(io_port);
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-}
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-
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-void init_scc_ioports(struct fs_platform_info *fpi)
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-{
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- int scc_no = fs_get_scc_index(fpi->fs_no);
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-
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- switch (scc_no) {
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- case 0:
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- init_scc1_ioports(fpi);
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- break;
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- default:
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- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
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- return;
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- }
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}
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-
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-
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-static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
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+static int __init mpc86xads_probe(void)
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{
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- unsigned *bcsr_io;
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- cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
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-
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- setbits32(&cp->cp_pbpar, 0x000000c0);
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- clrbits32(&cp->cp_pbdir, 0x000000c0);
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- clrbits16(&cp->cp_pbodr, 0x00c0);
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- immr_unmap(cp);
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-
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- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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-
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- if (bcsr_io == NULL) {
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- printk(KERN_CRIT "Could not remap BCSR1\n");
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- return;
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- }
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- clrbits32(bcsr_io,BCSR1_RS232EN_1);
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- iounmap(bcsr_io);
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+ unsigned long root = of_get_flat_dt_root();
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+ return of_flat_dt_is_compatible(root, "fsl,mpc866ads");
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}
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-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi)
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-{
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- unsigned *bcsr_io;
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- cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
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-
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- setbits32(&cp->cp_pbpar, 0x00000c00);
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- clrbits32(&cp->cp_pbdir, 0x00000c00);
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- clrbits16(&cp->cp_pbodr, 0x0c00);
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- immr_unmap(cp);
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-
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- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
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-
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- if (bcsr_io == NULL) {
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- printk(KERN_CRIT "Could not remap BCSR1\n");
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- return;
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- }
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- clrbits32(bcsr_io,BCSR1_RS232EN_2);
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- iounmap(bcsr_io);
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-}
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+static struct of_device_id __initdata of_bus_ids[] = {
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+ { .name = "soc", },
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+ { .name = "cpm", },
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+ { .name = "localbus", },
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+ {},
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+};
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-void init_smc_ioports(struct fs_uart_platform_info *data)
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+static int __init declare_of_platform_devices(void)
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{
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- int smc_no = fs_uart_id_fsid2smc(data->fs_no);
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+ if (machine_is(mpc86x_ads))
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+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
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- switch (smc_no) {
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- case 0:
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- init_smc1_uart_ioports(data);
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- data->brg = data->clk_rx;
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- break;
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- case 1:
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- init_smc2_uart_ioports(data);
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- data->brg = data->clk_rx;
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- break;
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- default:
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- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
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- return;
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- }
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-}
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-
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-int platform_device_skip(const char *model, int id)
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-{
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return 0;
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}
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-
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-static void __init mpc86xads_setup_arch(void)
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-{
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- cpm_reset();
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-
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- mpc86xads_board_setup();
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-
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- ROOT_DEV = Root_NFS;
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-}
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-
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-static int __init mpc86xads_probe(void)
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-{
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- char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
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- "model", NULL);
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- if (model == NULL)
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- return 0;
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- if (strcmp(model, "MPC866ADS"))
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- return 0;
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-
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- return 1;
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-}
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+device_initcall(declare_of_platform_devices);
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define_machine(mpc86x_ads) {
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.name = "MPC86x ADS",
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@@ -275,4 +145,5 @@ define_machine(mpc86x_ads) {
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.calibrate_decr = mpc8xx_calibrate_decr,
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.set_rtc_time = mpc8xx_set_rtc_time,
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.get_rtc_time = mpc8xx_get_rtc_time,
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+ .progress = udbg_progress,
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};
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