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@@ -4126,4 +4126,78 @@ static int free_irq(int irq)
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return 0;
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}
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+static void compose_msi_msg(struct pci_dev *pdev,
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+ unsigned int irq, unsigned int dest,
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+ struct msi_msg *msg, u8 hpet_id)
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+{
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+ struct irq_2_iommu *irte_info;
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+ struct irq_cfg *cfg;
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+ union irte irte;
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+
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+ cfg = irq_get_chip_data(irq);
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+ if (!cfg)
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+ return;
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+
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+ irte_info = &cfg->irq_2_iommu;
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+
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+ irte.val = 0;
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+ irte.fields.vector = cfg->vector;
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+ irte.fields.int_type = apic->irq_delivery_mode;
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+ irte.fields.destination = dest;
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+ irte.fields.dm = apic->irq_dest_mode;
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+ irte.fields.valid = 1;
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+
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+ modify_irte(irte_info->sub_handle, irte_info->irte_index, irte);
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+
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+ msg->address_hi = MSI_ADDR_BASE_HI;
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+ msg->address_lo = MSI_ADDR_BASE_LO;
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+ msg->data = irte_info->irte_index;
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+}
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+
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+static int msi_alloc_irq(struct pci_dev *pdev, int irq, int nvec)
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+{
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+ struct irq_cfg *cfg;
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+ int index;
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+ u16 devid;
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+
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+ if (!pdev)
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+ return -EINVAL;
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+
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+ cfg = irq_get_chip_data(irq);
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+ if (!cfg)
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+ return -EINVAL;
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+
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+ devid = get_device_id(&pdev->dev);
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+ index = alloc_irq_index(cfg, devid, nvec);
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+
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+ return index < 0 ? MAX_IRQS_PER_TABLE : index;
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+}
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+
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+static int msi_setup_irq(struct pci_dev *pdev, unsigned int irq,
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+ int index, int offset)
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+{
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+ struct irq_2_iommu *irte_info;
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+ struct irq_cfg *cfg;
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+ u16 devid;
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+
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+ if (!pdev)
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+ return -EINVAL;
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+
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+ cfg = irq_get_chip_data(irq);
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+ if (!cfg)
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+ return -EINVAL;
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+
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+ if (index >= MAX_IRQS_PER_TABLE)
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+ return 0;
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+
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+ devid = get_device_id(&pdev->dev);
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+ irte_info = &cfg->irq_2_iommu;
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+
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+ irte_info->sub_handle = devid;
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+ irte_info->irte_index = index + offset;
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+ irte_info->iommu = (void *)cfg;
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+
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+ return 0;
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+}
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+
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#endif
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