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@@ -3516,6 +3516,15 @@ void e1000e_reset(struct e1000_adapter *adapter)
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break;
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}
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+ /*
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+ * Alignment of Tx data is on an arbitrary byte boundary with the
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+ * maximum size per Tx descriptor limited only to the transmit
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+ * allocation of the packet buffer minus 96 bytes with an upper
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+ * limit of 24KB due to receive synchronization limitations.
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+ */
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+ adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
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+ 24 << 10);
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+
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/*
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* Disable Adaptive Interrupt Moderation if 2 full packets cannot
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* fit in receive buffer.
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@@ -4785,12 +4794,9 @@ static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
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return 1;
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}
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-#define E1000_MAX_PER_TXD 8192
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-#define E1000_MAX_TXD_PWR 12
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-
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static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
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unsigned int first, unsigned int max_per_txd,
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- unsigned int nr_frags, unsigned int mss)
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+ unsigned int nr_frags)
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{
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struct e1000_adapter *adapter = tx_ring->adapter;
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struct pci_dev *pdev = adapter->pdev;
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@@ -5023,20 +5029,19 @@ static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
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static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
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{
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+ BUG_ON(size > tx_ring->count);
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+
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if (e1000_desc_unused(tx_ring) >= size)
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return 0;
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return __e1000_maybe_stop_tx(tx_ring, size);
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}
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-#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1)
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static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
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struct net_device *netdev)
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{
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struct e1000_adapter *adapter = netdev_priv(netdev);
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struct e1000_ring *tx_ring = adapter->tx_ring;
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unsigned int first;
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- unsigned int max_per_txd = E1000_MAX_PER_TXD;
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- unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
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unsigned int tx_flags = 0;
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unsigned int len = skb_headlen(skb);
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unsigned int nr_frags;
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@@ -5056,18 +5061,8 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
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}
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mss = skb_shinfo(skb)->gso_size;
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- /*
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- * The controller does a simple calculation to
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- * make sure there is enough room in the FIFO before
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- * initiating the DMA for each buffer. The calc is:
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- * 4 = ceil(buffer len/mss). To make sure we don't
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- * overrun the FIFO, adjust the max buffer len if mss
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- * drops.
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- */
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if (mss) {
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u8 hdr_len;
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- max_per_txd = min(mss << 2, max_per_txd);
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- max_txd_pwr = fls(max_per_txd) - 1;
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/*
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* TSO Workaround for 82571/2/3 Controllers -- if skb->data
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@@ -5097,12 +5092,12 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
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count++;
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count++;
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- count += TXD_USE_COUNT(len, max_txd_pwr);
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+ count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
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nr_frags = skb_shinfo(skb)->nr_frags;
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for (f = 0; f < nr_frags; f++)
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- count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
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- max_txd_pwr);
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+ count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
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+ adapter->tx_fifo_limit);
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if (adapter->hw.mac.tx_pkt_filtering)
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e1000_transfer_dhcp_info(adapter, skb);
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@@ -5144,15 +5139,18 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
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tx_flags |= E1000_TX_FLAGS_NO_FCS;
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/* if count is 0 then mapping error has occurred */
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- count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss);
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+ count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
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+ nr_frags);
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if (count) {
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skb_tx_timestamp(skb);
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netdev_sent_queue(netdev, skb->len);
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e1000_tx_queue(tx_ring, tx_flags, count);
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/* Make sure there is space in the ring for the next send. */
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- e1000_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 2);
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-
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+ e1000_maybe_stop_tx(tx_ring,
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+ (MAX_SKB_FRAGS *
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+ DIV_ROUND_UP(PAGE_SIZE,
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+ adapter->tx_fifo_limit) + 2));
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} else {
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dev_kfree_skb_any(skb);
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tx_ring->buffer_info[first].time_stamp = 0;
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@@ -6327,8 +6325,8 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
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adapter->hw.phy.autoneg_advertised = 0x2f;
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/* ring size defaults */
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- adapter->rx_ring->count = 256;
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- adapter->tx_ring->count = 256;
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+ adapter->rx_ring->count = E1000_DEFAULT_RXD;
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+ adapter->tx_ring->count = E1000_DEFAULT_TXD;
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/*
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* Initial Wake on LAN setting - If APM wake is enabled in
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