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@@ -38,7 +38,8 @@
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#endif /* PCI_DEVICE_ID_INTEL_82875_6 */
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/* four csrows in dual channel, eight in single channel */
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-#define I82875P_NR_CSROWS(nr_chans) (8/(nr_chans))
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+#define I82875P_NR_DIMMS 8
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+#define I82875P_NR_CSROWS(nr_chans) (I82875P_NR_DIMMS / (nr_chans))
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/* Intel 82875p register addresses - device 0 function 0 - DRAM Controller */
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#define I82875P_EAP 0x58 /* Error Address Pointer (32b)
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@@ -235,7 +236,9 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci,
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return 1;
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if ((info->errsts ^ info->errsts2) & 0x0081) {
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- edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
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+ edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
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+ -1, -1, -1,
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+ "UE overwrote CE", "", NULL);
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info->errsts = info->errsts2;
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}
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@@ -243,11 +246,15 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci,
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row = edac_mc_find_csrow_by_page(mci, info->eap);
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if (info->errsts & 0x0080)
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- edac_mc_handle_ue(mci, info->eap, 0, row, "i82875p UE");
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+ edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
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+ info->eap, 0, 0,
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+ row, -1, -1,
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+ "i82875p UE", "", NULL);
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else
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- edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row,
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- multi_chan ? (info->des & 0x1) : 0,
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- "i82875p CE");
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+ edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
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+ info->eap, 0, info->derrsyn,
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+ row, multi_chan ? (info->des & 0x1) : 0,
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+ -1, "i82875p CE", "", NULL);
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return 1;
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}
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@@ -390,6 +397,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
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{
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int rc = -ENODEV;
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struct mem_ctl_info *mci;
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+ struct edac_mc_layer layers[2];
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struct i82875p_pvt *pvt;
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struct pci_dev *ovrfl_pdev;
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void __iomem *ovrfl_window;
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@@ -405,9 +413,14 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
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return -ENODEV;
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drc = readl(ovrfl_window + I82875P_DRC);
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nr_chans = dual_channel_active(drc) + 1;
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- mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
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- nr_chans, 0);
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+ layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
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+ layers[0].size = I82875P_NR_CSROWS(nr_chans);
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+ layers[0].is_virt_csrow = true;
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+ layers[1].type = EDAC_MC_LAYER_CHANNEL;
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+ layers[1].size = nr_chans;
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+ layers[1].is_virt_csrow = false;
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+ mci = new_edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt));
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if (!mci) {
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rc = -ENOMEM;
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goto fail0;
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