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@@ -365,11 +365,10 @@ static int amd_decode_mce(struct notifier_block *nb, unsigned long val,
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pr_emerg("MC%d_STATUS: ", m->bank);
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pr_emerg("MC%d_STATUS: ", m->bank);
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- pr_cont("%sorrected error, report: %s, MiscV: %svalid, "
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+ pr_cont("%sorrected error, other errors lost: %s, "
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"CPU context corrupt: %s",
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"CPU context corrupt: %s",
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((m->status & MCI_STATUS_UC) ? "Unc" : "C"),
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((m->status & MCI_STATUS_UC) ? "Unc" : "C"),
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- ((m->status & MCI_STATUS_EN) ? "yes" : "no"),
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- ((m->status & MCI_STATUS_MISCV) ? "" : "in"),
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+ ((m->status & MCI_STATUS_OVER) ? "yes" : "no"),
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((m->status & MCI_STATUS_PCC) ? "yes" : "no"));
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((m->status & MCI_STATUS_PCC) ? "yes" : "no"));
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/* do the two bits[14:13] together */
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/* do the two bits[14:13] together */
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@@ -426,11 +425,15 @@ static struct notifier_block amd_mce_dec_nb = {
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static int __init mce_amd_init(void)
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static int __init mce_amd_init(void)
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{
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{
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/*
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/*
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- * We can decode MCEs for Opteron and later CPUs:
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+ * We can decode MCEs for K8, F10h and F11h CPUs:
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*/
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*/
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- if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
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- (boot_cpu_data.x86 >= 0xf))
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- atomic_notifier_chain_register(&x86_mce_decoder_chain, &amd_mce_dec_nb);
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+ if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
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+ return 0;
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+
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+ if (boot_cpu_data.x86 < 0xf || boot_cpu_data.x86 > 0x11)
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+ return 0;
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+
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+ atomic_notifier_chain_register(&x86_mce_decoder_chain, &amd_mce_dec_nb);
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return 0;
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return 0;
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}
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}
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