|
@@ -1369,6 +1369,7 @@ static struct clk emif1_ick = {
|
|
.ops = &clkops_omap2_dflt,
|
|
.ops = &clkops_omap2_dflt,
|
|
.enable_reg = OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL,
|
|
.enable_reg = OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL,
|
|
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
|
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
|
|
|
+ .flags = ENABLE_ON_INIT,
|
|
.clkdm_name = "l3_emif_clkdm",
|
|
.clkdm_name = "l3_emif_clkdm",
|
|
.parent = &ddrphy_ck,
|
|
.parent = &ddrphy_ck,
|
|
.recalc = &followparent_recalc,
|
|
.recalc = &followparent_recalc,
|
|
@@ -1379,6 +1380,7 @@ static struct clk emif2_ick = {
|
|
.ops = &clkops_omap2_dflt,
|
|
.ops = &clkops_omap2_dflt,
|
|
.enable_reg = OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL,
|
|
.enable_reg = OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL,
|
|
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
|
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
|
|
|
+ .flags = ENABLE_ON_INIT,
|
|
.clkdm_name = "l3_emif_clkdm",
|
|
.clkdm_name = "l3_emif_clkdm",
|
|
.parent = &ddrphy_ck,
|
|
.parent = &ddrphy_ck,
|
|
.recalc = &followparent_recalc,
|
|
.recalc = &followparent_recalc,
|