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@@ -176,7 +176,7 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha
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pci_write_config_dword(dev, PCI_ROM_ADDRESS,
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pci_write_config_dword(dev, PCI_ROM_ADDRESS,
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dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
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dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
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printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n",
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printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n",
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- dev->resource[PCI_ROM_RESOURCE].start);
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+ (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
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}
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}
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pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
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pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
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} else {
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} else {
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