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@@ -184,6 +184,7 @@ typedef struct _drm_i915_sarea {
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#define DRM_I915_GEM_GET_TILING 0x22
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#define DRM_I915_GEM_GET_APERTURE 0x23
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#define DRM_I915_GEM_MMAP_GTT 0x24
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+#define DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25
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#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
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#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
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@@ -219,6 +220,7 @@ typedef struct _drm_i915_sarea {
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#define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling)
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#define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling)
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#define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture)
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+#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_intel_get_pipe_from_crtc_id)
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/* Allow drivers to submit batchbuffers directly to hardware, relying
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* on the security mechanisms provided by hardware.
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@@ -657,4 +659,12 @@ struct drm_i915_gem_get_aperture {
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__u64 aper_available_size;
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};
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+struct drm_i915_get_pipe_from_crtc_id {
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+ /** ID of CRTC being requested **/
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+ __u32 crtc_id;
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+
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+ /** pipe of requested CRTC **/
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+ __u32 pipe;
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+};
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+
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#endif /* _I915_DRM_H_ */
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