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@@ -33,13 +33,21 @@
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#include <linux/smp.h>
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#include <linux/io.h>
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+#ifdef CONFIG_EISA
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+#include <linux/ioport.h>
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+#include <linux/eisa.h>
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+#endif
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+
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+#ifdef CONFIG_MCA
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+#include <linux/mca.h>
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+#endif
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+
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#if defined(CONFIG_EDAC)
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#include <linux/edac.h>
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#endif
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#include <asm/stacktrace.h>
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#include <asm/processor.h>
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-#include <asm/kmemcheck.h>
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#include <asm/debugreg.h>
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#include <asm/atomic.h>
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#include <asm/system.h>
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@@ -50,10 +58,35 @@
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#include <mach_traps.h>
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+#ifdef CONFIG_X86_64
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#include <asm/pgalloc.h>
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#include <asm/proto.h>
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#include <asm/pda.h>
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+#else
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+#include <asm/processor-flags.h>
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+#include <asm/arch_hooks.h>
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+#include <asm/nmi.h>
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+#include <asm/smp.h>
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+#include <asm/io.h>
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+
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+#include "cpu/mcheck/mce.h"
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+DECLARE_BITMAP(used_vectors, NR_VECTORS);
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+EXPORT_SYMBOL_GPL(used_vectors);
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+
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+asmlinkage int system_call(void);
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+
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+/* Do we ignore FPU interrupts ? */
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+char ignore_fpu_irq;
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+
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+/*
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+ * The IDT has to be page-aligned to simplify the Pentium
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+ * F0 0F bug workaround.. We have a special link segment
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+ * for this.
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+ */
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+gate_desc idt_table[256]
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+ __attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, };
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+#endif
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static int ignore_nmis;
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@@ -77,15 +110,80 @@ static inline void preempt_conditional_cli(struct pt_regs *regs)
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dec_preempt_count();
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}
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+#ifdef CONFIG_X86_32
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+static inline void
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+die_if_kernel(const char *str, struct pt_regs *regs, long err)
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+{
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+ if (!user_mode_vm(regs))
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+ die(str, regs, err);
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+}
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+
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+/*
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+ * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
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+ * invalid offset set (the LAZY one) and the faulting thread has
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+ * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS,
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+ * we set the offset field correctly and return 1.
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+ */
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+static int lazy_iobitmap_copy(void)
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+{
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+ struct thread_struct *thread;
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+ struct tss_struct *tss;
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+ int cpu;
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+
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+ cpu = get_cpu();
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+ tss = &per_cpu(init_tss, cpu);
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+ thread = ¤t->thread;
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+
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+ if (tss->x86_tss.io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
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+ thread->io_bitmap_ptr) {
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+ memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
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+ thread->io_bitmap_max);
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+ /*
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+ * If the previously set map was extending to higher ports
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+ * than the current one, pad extra space with 0xff (no access).
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+ */
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+ if (thread->io_bitmap_max < tss->io_bitmap_max) {
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+ memset((char *) tss->io_bitmap +
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+ thread->io_bitmap_max, 0xff,
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+ tss->io_bitmap_max - thread->io_bitmap_max);
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+ }
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+ tss->io_bitmap_max = thread->io_bitmap_max;
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+ tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
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+ tss->io_bitmap_owner = thread;
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+ put_cpu();
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+
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+ return 1;
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+ }
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+ put_cpu();
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+
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+ return 0;
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+}
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+#endif
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+
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static void __kprobes
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do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
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long error_code, siginfo_t *info)
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{
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struct task_struct *tsk = current;
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+#ifdef CONFIG_X86_32
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+ if (regs->flags & X86_VM_MASK) {
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+ /*
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+ * traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
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+ * On nmi (interrupt 2), do_trap should not be called.
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+ */
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+ if (trapnr < 6)
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+ goto vm86_trap;
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+ goto trap_signal;
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+ }
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+#endif
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+
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if (!user_mode(regs))
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goto kernel_trap;
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+#ifdef CONFIG_X86_32
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+trap_signal:
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+#endif
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/*
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* We want error_code and trap_no set for userspace faults and
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* kernelspace faults which result in die(), but not
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@@ -98,6 +196,7 @@ do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = trapnr;
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+#ifdef CONFIG_X86_64
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if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
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printk_ratelimit()) {
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printk(KERN_INFO
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@@ -107,6 +206,7 @@ do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
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print_vma_addr(" in ", regs->ip);
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printk("\n");
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}
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+#endif
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if (info)
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force_sig_info(signr, info, tsk);
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@@ -121,6 +221,14 @@ kernel_trap:
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die(str, regs, error_code);
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}
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return;
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+
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+#ifdef CONFIG_X86_32
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+vm86_trap:
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+ if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
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+ error_code, trapnr))
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+ goto trap_signal;
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+ return;
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+#endif
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}
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#define DO_ERROR(trapnr, signr, str, name) \
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@@ -155,8 +263,12 @@ DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
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DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
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DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
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DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
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+#ifdef CONFIG_X86_32
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+DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
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+#endif
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DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
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+#ifdef CONFIG_X86_64
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/* Runs on IST stack */
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dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
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{
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@@ -184,6 +296,7 @@ dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
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for (;;)
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die(str, regs, error_code);
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}
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+#endif
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dotraplinkage void __kprobes
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do_general_protection(struct pt_regs *regs, long error_code)
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@@ -192,6 +305,16 @@ do_general_protection(struct pt_regs *regs, long error_code)
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conditional_sti(regs);
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+#ifdef CONFIG_X86_32
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+ if (lazy_iobitmap_copy()) {
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+ /* restart the faulting instruction */
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+ return;
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+ }
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+
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+ if (regs->flags & X86_VM_MASK)
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+ goto gp_in_vm86;
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+#endif
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+
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tsk = current;
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if (!user_mode(regs))
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goto gp_in_kernel;
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@@ -212,6 +335,13 @@ do_general_protection(struct pt_regs *regs, long error_code)
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force_sig(SIGSEGV, tsk);
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return;
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+#ifdef CONFIG_X86_32
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+gp_in_vm86:
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+ local_irq_enable();
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+ handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
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+ return;
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+#endif
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+
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gp_in_kernel:
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if (fixup_exception(regs))
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return;
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@@ -277,6 +407,16 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
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if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) ==
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NOTIFY_STOP)
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return;
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+#ifdef CONFIG_MCA
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+ /*
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+ * Might actually be able to figure out what the guilty party
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+ * is:
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+ */
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+ if (MCA_bus) {
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+ mca_handle_nmi();
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+ return;
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+ }
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+#endif
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printk(KERN_EMERG
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"Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
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reason, smp_processor_id());
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@@ -288,6 +428,43 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
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printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
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}
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+#ifdef CONFIG_X86_32
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+static DEFINE_SPINLOCK(nmi_print_lock);
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+
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+void notrace __kprobes die_nmi(char *str, struct pt_regs *regs, int do_panic)
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+{
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+ if (notify_die(DIE_NMIWATCHDOG, str, regs, 0, 2, SIGINT) == NOTIFY_STOP)
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+ return;
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+
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+ spin_lock(&nmi_print_lock);
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+ /*
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+ * We are in trouble anyway, lets at least try
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+ * to get a message out:
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+ */
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+ bust_spinlocks(1);
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+ printk(KERN_EMERG "%s", str);
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+ printk(" on CPU%d, ip %08lx, registers:\n",
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+ smp_processor_id(), regs->ip);
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+ show_registers(regs);
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+ if (do_panic)
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+ panic("Non maskable interrupt");
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+ console_silent();
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+ spin_unlock(&nmi_print_lock);
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+ bust_spinlocks(0);
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+
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+ /*
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+ * If we are in kernel we are probably nested up pretty bad
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+ * and might aswell get out now while we still can:
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+ */
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+ if (!user_mode_vm(regs)) {
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+ current->thread.trap_no = 2;
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+ crash_kexec(regs);
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+ }
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+
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+ do_exit(SIGSEGV);
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+}
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+#endif
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+
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static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
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{
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unsigned char reason = 0;
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@@ -303,6 +480,7 @@ static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
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if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT)
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== NOTIFY_STOP)
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return;
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+#ifdef CONFIG_X86_LOCAL_APIC
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/*
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* Ok, so this is none of the documented NMI sources,
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* so it must be the NMI watchdog.
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@@ -311,6 +489,9 @@ static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
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return;
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if (!do_nmi_callback(regs, cpu))
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unknown_nmi_error(reason, regs);
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+#else
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+ unknown_nmi_error(reason, regs);
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+#endif
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return;
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}
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@@ -322,6 +503,13 @@ static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
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mem_parity_error(reason, regs);
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if (reason & 0x40)
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io_check_error(reason, regs);
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+#ifdef CONFIG_X86_32
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+ /*
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+ * Reassert NMI in case it became active meanwhile
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+ * as it's edge-triggered:
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+ */
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+ reassert_nmi();
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+#endif
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}
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dotraplinkage notrace __kprobes void
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@@ -329,7 +517,11 @@ do_nmi(struct pt_regs *regs, long error_code)
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{
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nmi_enter();
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+#ifdef CONFIG_X86_32
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+ { int cpu; cpu = smp_processor_id(); ++nmi_count(cpu); }
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+#else
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add_pda(__nmi_count, 1);
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+#endif
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if (!ignore_nmis)
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default_do_nmi(regs);
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@@ -352,15 +544,22 @@ void restart_nmi(void)
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/* May run on IST stack. */
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dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
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{
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+#ifdef CONFIG_KPROBES
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if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
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== NOTIFY_STOP)
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return;
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+#else
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+ if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
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+ == NOTIFY_STOP)
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+ return;
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+#endif
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preempt_conditional_sti(regs);
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do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
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preempt_conditional_cli(regs);
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}
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+#ifdef CONFIG_X86_64
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/* Help handler running on IST stack to switch back to user stack
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for scheduling or signal handling. The actual stack switch is done in
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entry.S */
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@@ -381,6 +580,7 @@ asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
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*regs = *eregs;
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return regs;
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}
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+#endif
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/*
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* Our handling of the processor debug registers is non-trivial.
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@@ -433,6 +633,11 @@ dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
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goto clear_dr7;
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}
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+#ifdef CONFIG_X86_32
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+ if (regs->flags & X86_VM_MASK)
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+ goto debug_vm86;
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+#endif
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+
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/* Save debug status register where ptrace can see it */
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tsk->thread.debugreg6 = condition;
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@@ -458,6 +663,13 @@ clear_dr7:
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preempt_conditional_cli(regs);
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return;
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+#ifdef CONFIG_X86_32
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+debug_vm86:
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+ handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
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+ preempt_conditional_cli(regs);
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+ return;
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+#endif
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+
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clear_TF_reenable:
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set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
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regs->flags &= ~X86_EFLAGS_TF;
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@@ -465,6 +677,7 @@ clear_TF_reenable:
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return;
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}
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+#ifdef CONFIG_X86_64
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static int kernel_math_error(struct pt_regs *regs, const char *str, int trapnr)
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{
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if (fixup_exception(regs))
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@@ -476,6 +689,7 @@ static int kernel_math_error(struct pt_regs *regs, const char *str, int trapnr)
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die(str, regs, 0);
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return 0;
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}
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+#endif
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/*
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* Note that we play around with the 'TS' bit in an attempt to get
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@@ -513,6 +727,9 @@ void math_error(void __user *ip)
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swd = get_fpu_swd(task);
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switch (swd & ~cwd & 0x3f) {
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case 0x000: /* No unmasked exception */
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+#ifdef CONFIG_X86_32
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+ return;
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+#endif
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default: /* Multiple exceptions */
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break;
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case 0x001: /* Invalid Op */
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@@ -543,9 +760,15 @@ void math_error(void __user *ip)
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dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
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{
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conditional_sti(regs);
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+
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+#ifdef CONFIG_X86_32
|
|
|
+ ignore_fpu_irq = 1;
|
|
|
+#else
|
|
|
if (!user_mode(regs) &&
|
|
|
kernel_math_error(regs, "kernel x87 math error", 16))
|
|
|
return;
|
|
|
+#endif
|
|
|
+
|
|
|
math_error((void __user *)regs->ip);
|
|
|
}
|
|
|
|
|
@@ -601,17 +824,64 @@ dotraplinkage void
|
|
|
do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
|
|
|
{
|
|
|
conditional_sti(regs);
|
|
|
+
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ if (cpu_has_xmm) {
|
|
|
+ /* Handle SIMD FPU exceptions on PIII+ processors. */
|
|
|
+ ignore_fpu_irq = 1;
|
|
|
+ simd_math_error((void __user *)regs->ip);
|
|
|
+ return;
|
|
|
+ }
|
|
|
+ /*
|
|
|
+ * Handle strange cache flush from user space exception
|
|
|
+ * in all other cases. This is undocumented behaviour.
|
|
|
+ */
|
|
|
+ if (regs->flags & X86_VM_MASK) {
|
|
|
+ handle_vm86_fault((struct kernel_vm86_regs *)regs, error_code);
|
|
|
+ return;
|
|
|
+ }
|
|
|
+ current->thread.trap_no = 19;
|
|
|
+ current->thread.error_code = error_code;
|
|
|
+ die_if_kernel("cache flush denied", regs, error_code);
|
|
|
+ force_sig(SIGSEGV, current);
|
|
|
+#else
|
|
|
if (!user_mode(regs) &&
|
|
|
kernel_math_error(regs, "kernel simd math error", 19))
|
|
|
return;
|
|
|
simd_math_error((void __user *)regs->ip);
|
|
|
+#endif
|
|
|
}
|
|
|
|
|
|
dotraplinkage void
|
|
|
do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
|
|
|
{
|
|
|
+ conditional_sti(regs);
|
|
|
+#if 0
|
|
|
+ /* No need to warn about this any longer. */
|
|
|
+ printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
|
|
|
+#endif
|
|
|
}
|
|
|
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+unsigned long patch_espfix_desc(unsigned long uesp, unsigned long kesp)
|
|
|
+{
|
|
|
+ struct desc_struct *gdt = get_cpu_gdt_table(smp_processor_id());
|
|
|
+ unsigned long base = (kesp - uesp) & -THREAD_SIZE;
|
|
|
+ unsigned long new_kesp = kesp - base;
|
|
|
+ unsigned long lim_pages = (new_kesp | (THREAD_SIZE - 1)) >> PAGE_SHIFT;
|
|
|
+ __u64 desc = *(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS];
|
|
|
+
|
|
|
+ /* Set up base for espfix segment */
|
|
|
+ desc &= 0x00f0ff0000000000ULL;
|
|
|
+ desc |= ((((__u64)base) << 16) & 0x000000ffffff0000ULL) |
|
|
|
+ ((((__u64)base) << 32) & 0xff00000000000000ULL) |
|
|
|
+ ((((__u64)lim_pages) << 32) & 0x000f000000000000ULL) |
|
|
|
+ (lim_pages & 0xffff);
|
|
|
+ *(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS] = desc;
|
|
|
+
|
|
|
+ return new_kesp;
|
|
|
+}
|
|
|
+#else
|
|
|
asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
|
|
|
{
|
|
|
}
|
|
@@ -619,6 +889,7 @@ asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
|
|
|
asmlinkage void __attribute__((weak)) mce_threshold_interrupt(void)
|
|
|
{
|
|
|
}
|
|
|
+#endif
|
|
|
|
|
|
/*
|
|
|
* 'math_state_restore()' saves the current math information in the
|
|
@@ -626,6 +897,9 @@ asmlinkage void __attribute__((weak)) mce_threshold_interrupt(void)
|
|
|
*
|
|
|
* Careful.. There are problems with IBM-designed IRQ13 behaviour.
|
|
|
* Don't touch unless you *really* know how it works.
|
|
|
+ *
|
|
|
+ * Must be called with kernel preemption disabled (in this case,
|
|
|
+ * local interrupts are disabled at the call-site in entry.S).
|
|
|
*/
|
|
|
asmlinkage void math_state_restore(void)
|
|
|
{
|
|
@@ -648,6 +922,9 @@ asmlinkage void math_state_restore(void)
|
|
|
}
|
|
|
|
|
|
clts(); /* Allow maths ops (or we recurse) */
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ restore_fpu(tsk);
|
|
|
+#else
|
|
|
/*
|
|
|
* Paranoid restore. send a SIGSEGV if we fail to restore the state.
|
|
|
*/
|
|
@@ -656,19 +933,78 @@ asmlinkage void math_state_restore(void)
|
|
|
force_sig(SIGSEGV, tsk);
|
|
|
return;
|
|
|
}
|
|
|
+#endif
|
|
|
thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
|
|
|
tsk->fpu_counter++;
|
|
|
}
|
|
|
EXPORT_SYMBOL_GPL(math_state_restore);
|
|
|
|
|
|
+#ifndef CONFIG_MATH_EMULATION
|
|
|
+asmlinkage void math_emulate(long arg)
|
|
|
+{
|
|
|
+ printk(KERN_EMERG
|
|
|
+ "math-emulation not enabled and no coprocessor found.\n");
|
|
|
+ printk(KERN_EMERG "killing %s.\n", current->comm);
|
|
|
+ force_sig(SIGFPE, current);
|
|
|
+ schedule();
|
|
|
+}
|
|
|
+#endif /* CONFIG_MATH_EMULATION */
|
|
|
+
|
|
|
dotraplinkage void __kprobes
|
|
|
do_device_not_available(struct pt_regs *regs, long error)
|
|
|
{
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ if (read_cr0() & X86_CR0_EM) {
|
|
|
+ conditional_sti(regs);
|
|
|
+ math_emulate(0);
|
|
|
+ } else {
|
|
|
+ math_state_restore(); /* interrupts still off */
|
|
|
+ conditional_sti(regs);
|
|
|
+ }
|
|
|
+#else
|
|
|
math_state_restore();
|
|
|
+#endif
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+#ifdef CONFIG_X86_MCE
|
|
|
+dotraplinkage void __kprobes do_machine_check(struct pt_regs *regs, long error)
|
|
|
+{
|
|
|
+ conditional_sti(regs);
|
|
|
+ machine_check_vector(regs, error);
|
|
|
}
|
|
|
+#endif
|
|
|
+
|
|
|
+dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
|
|
|
+{
|
|
|
+ siginfo_t info;
|
|
|
+ local_irq_enable();
|
|
|
+
|
|
|
+ info.si_signo = SIGILL;
|
|
|
+ info.si_errno = 0;
|
|
|
+ info.si_code = ILL_BADSTK;
|
|
|
+ info.si_addr = 0;
|
|
|
+ if (notify_die(DIE_TRAP, "iret exception",
|
|
|
+ regs, error_code, 32, SIGILL) == NOTIFY_STOP)
|
|
|
+ return;
|
|
|
+ do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
|
|
|
+}
|
|
|
+#endif
|
|
|
|
|
|
void __init trap_init(void)
|
|
|
{
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ int i;
|
|
|
+#endif
|
|
|
+
|
|
|
+#ifdef CONFIG_EISA
|
|
|
+ void __iomem *p = early_ioremap(0x0FFFD9, 4);
|
|
|
+
|
|
|
+ if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
|
|
|
+ EISA_bus = 1;
|
|
|
+ early_iounmap(p, 4);
|
|
|
+#endif
|
|
|
+
|
|
|
set_intr_gate(0, ÷_error);
|
|
|
set_intr_gate_ist(1, &debug, DEBUG_STACK);
|
|
|
set_intr_gate_ist(2, &nmi, NMI_STACK);
|
|
@@ -679,7 +1015,11 @@ void __init trap_init(void)
|
|
|
set_intr_gate(5, &bounds);
|
|
|
set_intr_gate(6, &invalid_op);
|
|
|
set_intr_gate(7, &device_not_available);
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
|
|
|
+#else
|
|
|
set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK);
|
|
|
+#endif
|
|
|
set_intr_gate(9, &coprocessor_segment_overrun);
|
|
|
set_intr_gate(10, &invalid_TSS);
|
|
|
set_intr_gate(11, &segment_not_present);
|
|
@@ -697,8 +1037,34 @@ void __init trap_init(void)
|
|
|
#ifdef CONFIG_IA32_EMULATION
|
|
|
set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
|
|
|
#endif
|
|
|
+
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ if (cpu_has_fxsr) {
|
|
|
+ printk(KERN_INFO "Enabling fast FPU save and restore... ");
|
|
|
+ set_in_cr4(X86_CR4_OSFXSR);
|
|
|
+ printk("done.\n");
|
|
|
+ }
|
|
|
+ if (cpu_has_xmm) {
|
|
|
+ printk(KERN_INFO
|
|
|
+ "Enabling unmasked SIMD FPU exception support... ");
|
|
|
+ set_in_cr4(X86_CR4_OSXMMEXCPT);
|
|
|
+ printk("done.\n");
|
|
|
+ }
|
|
|
+
|
|
|
+ set_system_trap_gate(SYSCALL_VECTOR, &system_call);
|
|
|
+
|
|
|
+ /* Reserve all the builtin and the syscall vector: */
|
|
|
+ for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
|
|
|
+ set_bit(i, used_vectors);
|
|
|
+
|
|
|
+ set_bit(SYSCALL_VECTOR, used_vectors);
|
|
|
+#endif
|
|
|
/*
|
|
|
* Should be a barrier for any external CPU state:
|
|
|
*/
|
|
|
cpu_init();
|
|
|
+
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ trap_init_hook();
|
|
|
+#endif
|
|
|
}
|