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@@ -489,10 +489,8 @@ omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)
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dev_err(&spi->dev, "TXS timed out\n");
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goto out;
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}
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-#ifdef VERBOSE
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- dev_dbg(&spi->dev, "write-%d %02x\n",
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+ dev_vdbg(&spi->dev, "write-%d %02x\n",
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word_len, *tx);
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-#endif
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__raw_writel(*tx++, tx_reg);
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}
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if (rx != NULL) {
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@@ -506,10 +504,8 @@ omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)
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(l & OMAP2_MCSPI_CHCONF_TURBO)) {
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omap2_mcspi_set_enable(spi, 0);
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*rx++ = __raw_readl(rx_reg);
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-#ifdef VERBOSE
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- dev_dbg(&spi->dev, "read-%d %02x\n",
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+ dev_vdbg(&spi->dev, "read-%d %02x\n",
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word_len, *(rx - 1));
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-#endif
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if (mcspi_wait_for_reg_bit(chstat_reg,
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OMAP2_MCSPI_CHSTAT_RXS) < 0) {
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dev_err(&spi->dev,
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@@ -522,10 +518,8 @@ omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)
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}
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*rx++ = __raw_readl(rx_reg);
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-#ifdef VERBOSE
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- dev_dbg(&spi->dev, "read-%d %02x\n",
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+ dev_vdbg(&spi->dev, "read-%d %02x\n",
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word_len, *(rx - 1));
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-#endif
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}
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} while (c);
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} else if (word_len <= 16) {
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@@ -542,10 +536,8 @@ omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)
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dev_err(&spi->dev, "TXS timed out\n");
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goto out;
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}
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-#ifdef VERBOSE
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- dev_dbg(&spi->dev, "write-%d %04x\n",
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+ dev_vdbg(&spi->dev, "write-%d %04x\n",
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word_len, *tx);
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-#endif
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__raw_writel(*tx++, tx_reg);
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}
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if (rx != NULL) {
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@@ -559,10 +551,8 @@ omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)
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(l & OMAP2_MCSPI_CHCONF_TURBO)) {
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omap2_mcspi_set_enable(spi, 0);
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*rx++ = __raw_readl(rx_reg);
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-#ifdef VERBOSE
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- dev_dbg(&spi->dev, "read-%d %04x\n",
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+ dev_vdbg(&spi->dev, "read-%d %04x\n",
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word_len, *(rx - 1));
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-#endif
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if (mcspi_wait_for_reg_bit(chstat_reg,
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OMAP2_MCSPI_CHSTAT_RXS) < 0) {
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dev_err(&spi->dev,
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@@ -575,10 +565,8 @@ omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)
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}
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*rx++ = __raw_readl(rx_reg);
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-#ifdef VERBOSE
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- dev_dbg(&spi->dev, "read-%d %04x\n",
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+ dev_vdbg(&spi->dev, "read-%d %04x\n",
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word_len, *(rx - 1));
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-#endif
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}
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} while (c);
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} else if (word_len <= 32) {
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@@ -595,10 +583,8 @@ omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)
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dev_err(&spi->dev, "TXS timed out\n");
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goto out;
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}
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-#ifdef VERBOSE
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- dev_dbg(&spi->dev, "write-%d %08x\n",
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+ dev_vdbg(&spi->dev, "write-%d %08x\n",
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word_len, *tx);
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-#endif
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__raw_writel(*tx++, tx_reg);
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}
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if (rx != NULL) {
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@@ -612,10 +598,8 @@ omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)
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(l & OMAP2_MCSPI_CHCONF_TURBO)) {
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omap2_mcspi_set_enable(spi, 0);
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*rx++ = __raw_readl(rx_reg);
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-#ifdef VERBOSE
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- dev_dbg(&spi->dev, "read-%d %08x\n",
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+ dev_vdbg(&spi->dev, "read-%d %08x\n",
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word_len, *(rx - 1));
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-#endif
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if (mcspi_wait_for_reg_bit(chstat_reg,
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OMAP2_MCSPI_CHSTAT_RXS) < 0) {
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dev_err(&spi->dev,
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@@ -628,10 +612,8 @@ omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer)
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}
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*rx++ = __raw_readl(rx_reg);
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-#ifdef VERBOSE
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- dev_dbg(&spi->dev, "read-%d %08x\n",
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+ dev_vdbg(&spi->dev, "read-%d %08x\n",
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word_len, *(rx - 1));
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-#endif
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}
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} while (c);
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}
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