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@@ -270,8 +270,8 @@ static struct clk dpll_abe_ck = {
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.dpll_data = &dpll_abe_dd,
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.dpll_data = &dpll_abe_dd,
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.init = &omap2_init_dpll_parent,
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.init = &omap2_init_dpll_parent,
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.ops = &clkops_omap3_noncore_dpll_ops,
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.ops = &clkops_omap3_noncore_dpll_ops,
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- .recalc = &omap3_dpll_recalc,
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- .round_rate = &omap2_dpll_round_rate,
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+ .recalc = &omap4_dpll_regm4xen_recalc,
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+ .round_rate = &omap4_dpll_regm4xen_round_rate,
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.set_rate = &omap3_noncore_dpll_set_rate,
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.set_rate = &omap3_noncore_dpll_set_rate,
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};
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};
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@@ -1195,11 +1195,25 @@ static struct clk l4_wkup_clk_mux_ck = {
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.recalc = &omap2_clksel_recalc,
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.recalc = &omap2_clksel_recalc,
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};
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};
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+static const struct clksel_rate div2_2to1_rates[] = {
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+ { .div = 1, .val = 1, .flags = RATE_IN_4430 },
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+ { .div = 2, .val = 0, .flags = RATE_IN_4430 },
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+ { .div = 0 },
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+};
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+
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+static const struct clksel ocp_abe_iclk_div[] = {
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+ { .parent = &aess_fclk, .rates = div2_2to1_rates },
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+ { .parent = NULL },
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+};
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+
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static struct clk ocp_abe_iclk = {
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static struct clk ocp_abe_iclk = {
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.name = "ocp_abe_iclk",
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.name = "ocp_abe_iclk",
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.parent = &aess_fclk,
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.parent = &aess_fclk,
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+ .clksel = ocp_abe_iclk_div,
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+ .clksel_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL,
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+ .clksel_mask = OMAP4430_CLKSEL_AESS_FCLK_MASK,
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.ops = &clkops_null,
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.ops = &clkops_null,
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- .recalc = &followparent_recalc,
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+ .recalc = &omap2_clksel_recalc,
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};
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};
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static struct clk per_abe_24m_fclk = {
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static struct clk per_abe_24m_fclk = {
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@@ -1398,9 +1412,9 @@ static struct clk dss_dss_clk = {
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};
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};
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static const struct clksel_rate div3_8to32_rates[] = {
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static const struct clksel_rate div3_8to32_rates[] = {
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- { .div = 8, .val = 0, .flags = RATE_IN_44XX },
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- { .div = 16, .val = 1, .flags = RATE_IN_44XX },
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- { .div = 32, .val = 2, .flags = RATE_IN_44XX },
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+ { .div = 8, .val = 0, .flags = RATE_IN_4460 },
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+ { .div = 16, .val = 1, .flags = RATE_IN_4460 },
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+ { .div = 32, .val = 2, .flags = RATE_IN_4460 },
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{ .div = 0 },
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{ .div = 0 },
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};
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};
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@@ -3363,17 +3377,6 @@ static struct omap_clk omap44xx_clks[] = {
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CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
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CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
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CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
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CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
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CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
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CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
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- CLK("omap_timer.1", "fck", &timer1_fck, CK_443X),
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- CLK("omap_timer.2", "fck", &timer2_fck, CK_443X),
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- CLK("omap_timer.3", "fck", &timer3_fck, CK_443X),
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- CLK("omap_timer.4", "fck", &timer4_fck, CK_443X),
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- CLK("omap_timer.5", "fck", &timer5_fck, CK_443X),
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- CLK("omap_timer.6", "fck", &timer6_fck, CK_443X),
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- CLK("omap_timer.7", "fck", &timer7_fck, CK_443X),
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- CLK("omap_timer.8", "fck", &timer8_fck, CK_443X),
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- CLK("omap_timer.9", "fck", &timer9_fck, CK_443X),
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- CLK("omap_timer.10", "fck", &timer10_fck, CK_443X),
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- CLK("omap_timer.11", "fck", &timer11_fck, CK_443X),
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CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X),
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CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X),
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CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X),
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CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X),
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CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X),
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CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X),
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@@ -3403,12 +3406,12 @@ int __init omap4xxx_clk_init(void)
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struct omap_clk *c;
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struct omap_clk *c;
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u32 cpu_clkflg;
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u32 cpu_clkflg;
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- if (cpu_is_omap44xx()) {
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+ if (cpu_is_omap443x()) {
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cpu_mask = RATE_IN_4430;
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cpu_mask = RATE_IN_4430;
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cpu_clkflg = CK_443X;
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cpu_clkflg = CK_443X;
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} else if (cpu_is_omap446x()) {
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} else if (cpu_is_omap446x()) {
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- cpu_mask = RATE_IN_4460;
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- cpu_clkflg = CK_446X;
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+ cpu_mask = RATE_IN_4460 | RATE_IN_4430;
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+ cpu_clkflg = CK_446X | CK_443X;
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} else {
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} else {
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return 0;
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return 0;
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}
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}
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