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@@ -462,6 +462,52 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
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#endif
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+
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+/* store this information for the driver.. */
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+struct smc_local {
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+ /*
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+ * If I have to wait until memory is available to send a
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+ * packet, I will store the skbuff here, until I get the
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+ * desired memory. Then, I'll send it out and free it.
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+ */
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+ struct sk_buff *pending_tx_skb;
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+ struct tasklet_struct tx_task;
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+
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+ /* version/revision of the SMC91x chip */
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+ int version;
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+
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+ /* Contains the current active transmission mode */
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+ int tcr_cur_mode;
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+
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+ /* Contains the current active receive mode */
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+ int rcr_cur_mode;
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+
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+ /* Contains the current active receive/phy mode */
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+ int rpc_cur_mode;
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+ int ctl_rfduplx;
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+ int ctl_rspeed;
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+
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+ u32 msg_enable;
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+ u32 phy_type;
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+ struct mii_if_info mii;
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+
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+ /* work queue */
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+ struct work_struct phy_configure;
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+ struct net_device *dev;
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+ int work_pending;
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+
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+ spinlock_t lock;
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+
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+#ifdef SMC_USE_PXA_DMA
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+ /* DMA needs the physical address of the chip */
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+ u_long physaddr;
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+ struct device *device;
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+#endif
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+ void __iomem *base;
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+ void __iomem *datacs;
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+};
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+
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+
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#ifdef SMC_USE_PXA_DMA
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/*
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* Let's use the DMA engine on the XScale PXA2xx for RX packets. This is
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@@ -476,11 +522,12 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
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#ifdef SMC_insl
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#undef SMC_insl
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#define SMC_insl(a, r, p, l) \
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- smc_pxa_dma_insl(a, lp->physaddr, r, dev->dma, p, l)
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+ smc_pxa_dma_insl(a, lp, r, dev->dma, p, l)
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static inline void
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-smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
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+smc_pxa_dma_insl(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma,
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u_char *buf, int len)
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{
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+ u_long physaddr = lp->physaddr;
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dma_addr_t dmabuf;
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/* fallback if no DMA available */
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@@ -497,7 +544,7 @@ smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
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}
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len *= 4;
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- dmabuf = dma_map_single(NULL, buf, len, DMA_FROM_DEVICE);
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+ dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE);
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DCSR(dma) = DCSR_NODESC;
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DTADR(dma) = dmabuf;
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DSADR(dma) = physaddr + reg;
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@@ -507,18 +554,19 @@ smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
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while (!(DCSR(dma) & DCSR_STOPSTATE))
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cpu_relax();
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DCSR(dma) = 0;
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- dma_unmap_single(NULL, dmabuf, len, DMA_FROM_DEVICE);
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+ dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE);
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}
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#endif
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#ifdef SMC_insw
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#undef SMC_insw
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#define SMC_insw(a, r, p, l) \
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- smc_pxa_dma_insw(a, lp->physaddr, r, dev->dma, p, l)
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+ smc_pxa_dma_insw(a, lp, r, dev->dma, p, l)
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static inline void
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-smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
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+smc_pxa_dma_insw(void __iomem *ioaddr, struct smc_local *lp, int reg, int dma,
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u_char *buf, int len)
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{
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+ u_long physaddr = lp->physaddr;
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dma_addr_t dmabuf;
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/* fallback if no DMA available */
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@@ -535,7 +583,7 @@ smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
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}
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len *= 2;
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- dmabuf = dma_map_single(NULL, buf, len, DMA_FROM_DEVICE);
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+ dmabuf = dma_map_single(lp->device, buf, len, DMA_FROM_DEVICE);
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DCSR(dma) = DCSR_NODESC;
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DTADR(dma) = dmabuf;
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DSADR(dma) = physaddr + reg;
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@@ -545,7 +593,7 @@ smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma,
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while (!(DCSR(dma) & DCSR_STOPSTATE))
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cpu_relax();
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DCSR(dma) = 0;
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- dma_unmap_single(NULL, dmabuf, len, DMA_FROM_DEVICE);
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+ dma_unmap_single(lp->device, dmabuf, len, DMA_FROM_DEVICE);
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}
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#endif
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