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@@ -4922,25 +4922,7 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
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"TPC[%02d] 0x%08x\n", i, targetPowerValT2[i]);
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"TPC[%02d] 0x%08x\n", i, targetPowerValT2[i]);
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}
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}
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- /*
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- * This is the TX power we send back to driver core,
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- * and it can use to pass to userspace to display our
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- * currently configured TX power setting.
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- *
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- * Since power is rate dependent, use one of the indices
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- * from the AR9300_Rates enum to select an entry from
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- * targetPowerValT2[] to report. Currently returns the
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- * power for HT40 MCS 0, HT20 MCS 0, or OFDM 6 Mbps
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- * as CCK power is less interesting (?).
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- */
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- i = ALL_TARGET_LEGACY_6_24; /* legacy */
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- if (IS_CHAN_HT40(chan))
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- i = ALL_TARGET_HT40_0_8_16; /* ht40 */
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- else if (IS_CHAN_HT20(chan))
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- i = ALL_TARGET_HT20_0_8_16; /* ht20 */
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-
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- ah->txpower_limit = targetPowerValT2[i];
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- regulatory->max_power_level = targetPowerValT2[i];
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+ ah->txpower_limit = regulatory->max_power_level;
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/* Write target power array to registers */
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/* Write target power array to registers */
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ar9003_hw_tx_power_regwrite(ah, targetPowerValT2);
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ar9003_hw_tx_power_regwrite(ah, targetPowerValT2);
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