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@@ -1,204 +0,0 @@
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-/*
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- * linux/arch/arm/mach-cintegrator/platsmp.c
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- *
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- * Copyright (C) 2002 ARM Ltd.
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- * All Rights Reserved
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- */
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-#include <linux/init.h>
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-#include <linux/kernel.h>
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-#include <linux/sched.h>
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-#include <linux/errno.h>
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-#include <linux/mm.h>
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-
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-#include <asm/atomic.h>
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-#include <asm/cacheflush.h>
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-#include <asm/delay.h>
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-#include <asm/mmu_context.h>
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-#include <asm/ptrace.h>
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-#include <asm/smp.h>
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-
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-extern void integrator_secondary_startup(void);
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-
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-/*
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- * control for which core is the next to come out of the secondary
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- * boot "holding pen"
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- */
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-volatile int __cpuinitdata pen_release = -1;
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-unsigned long __cpuinitdata phys_pen_release = 0;
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-
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-static DEFINE_SPINLOCK(boot_lock);
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-
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-void __cpuinit platform_secondary_init(unsigned int cpu)
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-{
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- /*
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- * the primary core may have used a "cross call" soft interrupt
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- * to get this processor out of WFI in the BootMonitor - make
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- * sure that we are no longer being sent this soft interrupt
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- */
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- smp_cross_call_done(cpumask_of_cpu(cpu));
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-
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- /*
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- * if any interrupts are already enabled for the primary
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- * core (e.g. timer irq), then they will not have been enabled
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- * for us: do so
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- */
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- secondary_scan_irqs();
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-
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- /*
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- * let the primary processor know we're out of the
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- * pen, then head off into the C entry point
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- */
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- pen_release = -1;
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-
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- /*
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- * Synchronise with the boot thread.
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- */
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- spin_lock(&boot_lock);
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- spin_unlock(&boot_lock);
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-}
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-
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-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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-{
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- unsigned long timeout;
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-
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- /*
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- * set synchronisation state between this boot processor
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- * and the secondary one
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- */
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- spin_lock(&boot_lock);
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-
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- /*
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- * The secondary processor is waiting to be released from
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- * the holding pen - release it, then wait for it to flag
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- * that it has been released by resetting pen_release.
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- *
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- * Note that "pen_release" is the hardware CPU ID, whereas
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- * "cpu" is Linux's internal ID.
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- */
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- pen_release = cpu;
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- flush_cache_all();
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-
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- /*
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- * XXX
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- *
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- * This is a later addition to the booting protocol: the
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- * bootMonitor now puts secondary cores into WFI, so
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- * poke_milo() no longer gets the cores moving; we need
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- * to send a soft interrupt to wake the secondary core.
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- * Use smp_cross_call() for this, since there's little
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- * point duplicating the code here
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- */
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- smp_cross_call(cpumask_of_cpu(cpu));
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-
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- timeout = jiffies + (1 * HZ);
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- while (time_before(jiffies, timeout)) {
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- if (pen_release == -1)
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- break;
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-
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- udelay(10);
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- }
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-
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- /*
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- * now the secondary core is starting up let it run its
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- * calibrations, then wait for it to finish
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- */
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- spin_unlock(&boot_lock);
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-
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- return pen_release != -1 ? -ENOSYS : 0;
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-}
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-
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-static void __init poke_milo(void)
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-{
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- extern void secondary_startup(void);
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-
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- /* nobody is to be released from the pen yet */
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- pen_release = -1;
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-
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- phys_pen_release = virt_to_phys(&pen_release);
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-
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- /*
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- * write the address of secondary startup into the system-wide
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- * flags register, then clear the bottom two bits, which is what
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- * BootMonitor is waiting for
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- */
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-#if 1
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-#define CINTEGRATOR_HDR_FLAGSS_OFFSET 0x30
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- __raw_writel(virt_to_phys(integrator_secondary_startup),
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- (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
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- CINTEGRATOR_HDR_FLAGSS_OFFSET));
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-#define CINTEGRATOR_HDR_FLAGSC_OFFSET 0x34
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- __raw_writel(3,
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- (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
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- CINTEGRATOR_HDR_FLAGSC_OFFSET));
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-#endif
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-
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- mb();
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-}
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-
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-/*
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- * Initialise the CPU possible map early - this describes the CPUs
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- * which may be present or become present in the system.
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- */
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-void __init smp_init_cpus(void)
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-{
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- unsigned int i, ncores = get_core_count();
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-
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- for (i = 0; i < ncores; i++)
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- cpu_set(i, cpu_possible_map);
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-}
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-
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-void __init smp_prepare_cpus(unsigned int max_cpus)
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-{
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- unsigned int ncores = get_core_count();
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- unsigned int cpu = smp_processor_id();
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- int i;
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-
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- /* sanity check */
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- if (ncores == 0) {
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- printk(KERN_ERR
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- "Integrator/CP: strange CM count of 0? Default to 1\n");
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-
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- ncores = 1;
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- }
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-
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- if (ncores > NR_CPUS) {
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- printk(KERN_WARNING
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- "Integrator/CP: no. of cores (%d) greater than configured "
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- "maximum of %d - clipping\n",
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- ncores, NR_CPUS);
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- ncores = NR_CPUS;
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- }
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-
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- /*
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- * start with some more config for the Boot CPU, now that
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- * the world is a bit more alive (which was not the case
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- * when smp_prepare_boot_cpu() was called)
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- */
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- smp_store_cpu_info(cpu);
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-
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- /*
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- * are we trying to boot more cores than exist?
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- */
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- if (max_cpus > ncores)
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- max_cpus = ncores;
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-
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- /*
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- * Initialise the present map, which describes the set of CPUs
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- * actually populated at the present time.
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- */
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- for (i = 0; i < max_cpus; i++)
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- cpu_set(i, cpu_present_map);
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-
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- /*
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- * Do we need any more CPUs? If so, then let them know where
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- * to start. Note that, on modern versions of MILO, the "poke"
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- * doesn't actually do anything until each individual core is
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- * sent a soft interrupt to get it out of WFI
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- */
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- if (max_cpus > 1)
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- poke_milo();
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-}
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