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@@ -1826,10 +1826,11 @@ static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv,
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}
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}
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}
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}
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-void i915_gem_reset_lists(struct drm_device *dev)
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+void i915_gem_reset(struct drm_device *dev)
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{
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_gem_object *obj_priv;
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struct drm_i915_gem_object *obj_priv;
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+ int i;
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i915_gem_reset_ring_lists(dev_priv, &dev_priv->render_ring);
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i915_gem_reset_ring_lists(dev_priv, &dev_priv->render_ring);
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if (HAS_BSD(dev))
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if (HAS_BSD(dev))
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@@ -1858,6 +1859,17 @@ void i915_gem_reset_lists(struct drm_device *dev)
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{
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{
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obj_priv->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
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obj_priv->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
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}
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}
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+
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+ /* The fence registers are invalidated so clear them out */
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+ for (i = 0; i < 16; i++) {
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+ struct drm_i915_fence_reg *reg;
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+
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+ reg = &dev_priv->fence_regs[i];
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+ if (!reg->obj)
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+ continue;
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+
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+ i915_gem_clear_fence_reg(reg->obj);
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+ }
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}
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}
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/**
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/**
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