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@@ -929,12 +929,12 @@ static void bnx2x_sp_event(struct bnx2x_fastpath *fp,
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DP(BNX2X_MSG_SP,
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DP(BNX2X_MSG_SP,
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"fp %d cid %d got ramrod #%d state is %x type is %d\n",
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"fp %d cid %d got ramrod #%d state is %x type is %d\n",
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- FP_IDX(fp), cid, command, bp->state,
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+ fp->index, cid, command, bp->state,
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rr_cqe->ramrod_cqe.ramrod_type);
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rr_cqe->ramrod_cqe.ramrod_type);
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bp->spq_left++;
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bp->spq_left++;
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- if (FP_IDX(fp)) {
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+ if (fp->index) {
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switch (command | fp->state) {
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switch (command | fp->state) {
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case (RAMROD_CMD_ID_ETH_CLIENT_SETUP |
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case (RAMROD_CMD_ID_ETH_CLIENT_SETUP |
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BNX2X_FP_STATE_OPENING):
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BNX2X_FP_STATE_OPENING):
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@@ -1411,7 +1411,7 @@ static inline void bnx2x_update_rx_prod(struct bnx2x *bp,
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for (i = 0; i < sizeof(struct ustorm_eth_rx_producers)/4; i++)
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for (i = 0; i < sizeof(struct ustorm_eth_rx_producers)/4; i++)
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REG_WR(bp, BAR_USTRORM_INTMEM +
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REG_WR(bp, BAR_USTRORM_INTMEM +
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- USTORM_RX_PRODS_OFFSET(BP_PORT(bp), FP_CL_ID(fp)) + i*4,
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+ USTORM_RX_PRODS_OFFSET(BP_PORT(bp), fp->cl_id) + i*4,
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((u32 *)&rx_prods)[i]);
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((u32 *)&rx_prods)[i]);
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mmiowb(); /* keep prod updates ordered */
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mmiowb(); /* keep prod updates ordered */
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@@ -1452,7 +1452,7 @@ static int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
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DP(NETIF_MSG_RX_STATUS,
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DP(NETIF_MSG_RX_STATUS,
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"queue[%d]: hw_comp_cons %u sw_comp_cons %u\n",
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"queue[%d]: hw_comp_cons %u sw_comp_cons %u\n",
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- FP_IDX(fp), hw_comp_cons, sw_comp_cons);
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+ fp->index, hw_comp_cons, sw_comp_cons);
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while (sw_comp_cons != hw_comp_cons) {
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while (sw_comp_cons != hw_comp_cons) {
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struct sw_rx_bd *rx_buf = NULL;
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struct sw_rx_bd *rx_buf = NULL;
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@@ -1648,7 +1648,7 @@ static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie)
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{
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{
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struct bnx2x_fastpath *fp = fp_cookie;
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struct bnx2x_fastpath *fp = fp_cookie;
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struct bnx2x *bp = fp->bp;
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struct bnx2x *bp = fp->bp;
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- int index = FP_IDX(fp);
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+ int index = fp->index;
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/* Return here if interrupt is disabled */
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/* Return here if interrupt is disabled */
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if (unlikely(atomic_read(&bp->intr_sem) != 0)) {
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if (unlikely(atomic_read(&bp->intr_sem) != 0)) {
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@@ -1657,8 +1657,8 @@ static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie)
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}
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}
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DP(BNX2X_MSG_FP, "got an MSI-X interrupt on IDX:SB [%d:%d]\n",
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DP(BNX2X_MSG_FP, "got an MSI-X interrupt on IDX:SB [%d:%d]\n",
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- index, FP_SB_ID(fp));
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- bnx2x_ack_sb(bp, FP_SB_ID(fp), USTORM_ID, 0, IGU_INT_DISABLE, 0);
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+ index, fp->sb_id);
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+ bnx2x_ack_sb(bp, fp->sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0);
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#ifdef BNX2X_STOP_ON_ERROR
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#ifdef BNX2X_STOP_ON_ERROR
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if (unlikely(bp->panic))
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if (unlikely(bp->panic))
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@@ -2641,7 +2641,7 @@ static inline void bnx2x_attn_int_deasserted1(struct bnx2x *bp, u32 attn)
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{
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{
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u32 val;
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u32 val;
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- if (attn & BNX2X_DOORQ_ASSERT) {
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+ if (attn & AEU_INPUTS_ATTN_BITS_DOORBELLQ_HW_INTERRUPT) {
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val = REG_RD(bp, DORQ_REG_DORQ_INT_STS_CLR);
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val = REG_RD(bp, DORQ_REG_DORQ_INT_STS_CLR);
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BNX2X_ERR("DB hw attention 0x%x\n", val);
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BNX2X_ERR("DB hw attention 0x%x\n", val);
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@@ -4641,11 +4641,11 @@ static void bnx2x_init_context(struct bnx2x *bp)
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struct eth_context *context = bnx2x_sp(bp, context[i].eth);
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struct eth_context *context = bnx2x_sp(bp, context[i].eth);
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struct bnx2x_fastpath *fp = &bp->fp[i];
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struct bnx2x_fastpath *fp = &bp->fp[i];
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u8 cl_id = fp->cl_id;
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u8 cl_id = fp->cl_id;
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- u8 sb_id = FP_SB_ID(fp);
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+ u8 sb_id = fp->sb_id;
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context->ustorm_st_context.common.sb_index_numbers =
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context->ustorm_st_context.common.sb_index_numbers =
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BNX2X_RX_SB_INDEX_NUM;
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BNX2X_RX_SB_INDEX_NUM;
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- context->ustorm_st_context.common.clientId = FP_CL_ID(fp);
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+ context->ustorm_st_context.common.clientId = cl_id;
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context->ustorm_st_context.common.status_block_id = sb_id;
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context->ustorm_st_context.common.status_block_id = sb_id;
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context->ustorm_st_context.common.flags =
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context->ustorm_st_context.common.flags =
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(USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_MC_ALIGNMENT |
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(USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_MC_ALIGNMENT |
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@@ -4686,7 +4686,7 @@ static void bnx2x_init_context(struct bnx2x *bp)
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U64_HI(fp->tx_prods_mapping);
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U64_HI(fp->tx_prods_mapping);
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context->xstorm_st_context.db_data_addr_lo =
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context->xstorm_st_context.db_data_addr_lo =
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U64_LO(fp->tx_prods_mapping);
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U64_LO(fp->tx_prods_mapping);
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- context->xstorm_st_context.statistics_data = (fp->cl_id |
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+ context->xstorm_st_context.statistics_data = (cl_id |
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XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE);
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XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE);
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context->cstorm_st_context.sb_index_number =
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context->cstorm_st_context.sb_index_number =
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C_SB_ETH_TX_CQ_INDEX;
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C_SB_ETH_TX_CQ_INDEX;
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@@ -4712,7 +4712,7 @@ static void bnx2x_init_ind_table(struct bnx2x *bp)
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for (i = 0; i < TSTORM_INDIRECTION_TABLE_SIZE; i++)
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for (i = 0; i < TSTORM_INDIRECTION_TABLE_SIZE; i++)
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REG_WR8(bp, BAR_TSTRORM_INTMEM +
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REG_WR8(bp, BAR_TSTRORM_INTMEM +
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TSTORM_INDIRECTION_TABLE_OFFSET(func) + i,
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TSTORM_INDIRECTION_TABLE_OFFSET(func) + i,
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- BP_CL_ID(bp) + (i % bp->num_rx_queues));
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+ bp->fp->cl_id + (i % bp->num_rx_queues));
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}
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}
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static void bnx2x_set_client_config(struct bnx2x *bp)
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static void bnx2x_set_client_config(struct bnx2x *bp)
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@@ -4998,14 +4998,14 @@ static void bnx2x_init_internal_func(struct bnx2x *bp)
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struct bnx2x_fastpath *fp = &bp->fp[i];
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struct bnx2x_fastpath *fp = &bp->fp[i];
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REG_WR(bp, BAR_USTRORM_INTMEM +
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REG_WR(bp, BAR_USTRORM_INTMEM +
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- USTORM_CQE_PAGE_BASE_OFFSET(port, FP_CL_ID(fp)),
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+ USTORM_CQE_PAGE_BASE_OFFSET(port, fp->cl_id),
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U64_LO(fp->rx_comp_mapping));
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U64_LO(fp->rx_comp_mapping));
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REG_WR(bp, BAR_USTRORM_INTMEM +
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REG_WR(bp, BAR_USTRORM_INTMEM +
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- USTORM_CQE_PAGE_BASE_OFFSET(port, FP_CL_ID(fp)) + 4,
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+ USTORM_CQE_PAGE_BASE_OFFSET(port, fp->cl_id) + 4,
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U64_HI(fp->rx_comp_mapping));
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U64_HI(fp->rx_comp_mapping));
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REG_WR16(bp, BAR_USTRORM_INTMEM +
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REG_WR16(bp, BAR_USTRORM_INTMEM +
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- USTORM_MAX_AGG_SIZE_OFFSET(port, FP_CL_ID(fp)),
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+ USTORM_MAX_AGG_SIZE_OFFSET(port, fp->cl_id),
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max_agg_size);
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max_agg_size);
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}
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}
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@@ -5116,9 +5116,9 @@ static void bnx2x_nic_init(struct bnx2x *bp, u32 load_code)
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fp->sb_id = fp->cl_id;
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fp->sb_id = fp->cl_id;
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DP(NETIF_MSG_IFUP,
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DP(NETIF_MSG_IFUP,
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"bnx2x_init_sb(%p,%p) index %d cl_id %d sb %d\n",
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"bnx2x_init_sb(%p,%p) index %d cl_id %d sb %d\n",
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- bp, fp->status_blk, i, FP_CL_ID(fp), FP_SB_ID(fp));
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+ bp, fp->status_blk, i, fp->cl_id, fp->sb_id);
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bnx2x_init_sb(bp, fp->status_blk, fp->status_blk_mapping,
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bnx2x_init_sb(bp, fp->status_blk, fp->status_blk_mapping,
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- FP_SB_ID(fp));
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+ fp->sb_id);
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bnx2x_update_fpsb_idx(fp);
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bnx2x_update_fpsb_idx(fp);
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}
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}
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@@ -6585,7 +6585,7 @@ static void bnx2x_set_mac_addr_e1(struct bnx2x *bp, int set)
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*/
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*/
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config->hdr.length = 2;
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config->hdr.length = 2;
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config->hdr.offset = port ? 32 : 0;
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config->hdr.offset = port ? 32 : 0;
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- config->hdr.client_id = BP_CL_ID(bp);
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+ config->hdr.client_id = bp->fp->cl_id;
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config->hdr.reserved1 = 0;
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config->hdr.reserved1 = 0;
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/* primary MAC */
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/* primary MAC */
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@@ -6643,7 +6643,7 @@ static void bnx2x_set_mac_addr_e1h(struct bnx2x *bp, int set)
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*/
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*/
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config->hdr.length = 1;
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config->hdr.length = 1;
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config->hdr.offset = BP_FUNC(bp);
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config->hdr.offset = BP_FUNC(bp);
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- config->hdr.client_id = BP_CL_ID(bp);
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+ config->hdr.client_id = bp->fp->cl_id;
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config->hdr.reserved1 = 0;
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config->hdr.reserved1 = 0;
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/* primary MAC */
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/* primary MAC */
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@@ -7045,7 +7045,7 @@ static int bnx2x_stop_leading(struct bnx2x *bp)
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/* Send HALT ramrod */
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/* Send HALT ramrod */
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bp->fp[0].state = BNX2X_FP_STATE_HALTING;
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bp->fp[0].state = BNX2X_FP_STATE_HALTING;
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- bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_HALT, 0, 0, BP_CL_ID(bp), 0);
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+ bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_HALT, 0, 0, bp->fp->cl_id, 0);
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/* Wait for completion */
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/* Wait for completion */
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rc = bnx2x_wait_ramrod(bp, BNX2X_FP_STATE_HALTED, 0,
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rc = bnx2x_wait_ramrod(bp, BNX2X_FP_STATE_HALTED, 0,
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@@ -7215,7 +7215,7 @@ static int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
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config->hdr.offset = BNX2X_MAX_EMUL_MULTI*(1 + port);
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config->hdr.offset = BNX2X_MAX_EMUL_MULTI*(1 + port);
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else
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else
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config->hdr.offset = BNX2X_MAX_MULTICAST*(1 + port);
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config->hdr.offset = BNX2X_MAX_MULTICAST*(1 + port);
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- config->hdr.client_id = BP_CL_ID(bp);
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+ config->hdr.client_id = bp->fp->cl_id;
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config->hdr.reserved1 = 0;
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config->hdr.reserved1 = 0;
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bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, 0,
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bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, 0,
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@@ -9392,7 +9392,7 @@ static int bnx2x_run_loopback(struct bnx2x *bp, int loopback_mode, u8 link_up)
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mb(); /* FW restriction: must not reorder writing nbd and packets */
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mb(); /* FW restriction: must not reorder writing nbd and packets */
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fp->hw_tx_prods->packets_prod =
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fp->hw_tx_prods->packets_prod =
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cpu_to_le32(le32_to_cpu(fp->hw_tx_prods->packets_prod) + 1);
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cpu_to_le32(le32_to_cpu(fp->hw_tx_prods->packets_prod) + 1);
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- DOORBELL(bp, FP_IDX(fp), 0);
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+ DOORBELL(bp, fp->index, 0);
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mmiowb();
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mmiowb();
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@@ -9545,7 +9545,7 @@ static int bnx2x_test_intr(struct bnx2x *bp)
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config->hdr.offset = (BP_PORT(bp) ? 32 : 0);
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config->hdr.offset = (BP_PORT(bp) ? 32 : 0);
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else
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else
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config->hdr.offset = BP_FUNC(bp);
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config->hdr.offset = BP_FUNC(bp);
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- config->hdr.client_id = BP_CL_ID(bp);
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+ config->hdr.client_id = bp->fp->cl_id;
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config->hdr.reserved1 = 0;
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config->hdr.reserved1 = 0;
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rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, 0,
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rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, 0,
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@@ -10050,9 +10050,9 @@ poll_panic:
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#endif
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#endif
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napi_complete(napi);
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napi_complete(napi);
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- bnx2x_ack_sb(bp, FP_SB_ID(fp), USTORM_ID,
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+ bnx2x_ack_sb(bp, fp->sb_id, USTORM_ID,
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le16_to_cpu(fp->fp_u_idx), IGU_INT_NOP, 1);
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le16_to_cpu(fp->fp_u_idx), IGU_INT_NOP, 1);
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- bnx2x_ack_sb(bp, FP_SB_ID(fp), CSTORM_ID,
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+ bnx2x_ack_sb(bp, fp->sb_id, CSTORM_ID,
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le16_to_cpu(fp->fp_c_idx), IGU_INT_ENABLE, 1);
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le16_to_cpu(fp->fp_c_idx), IGU_INT_ENABLE, 1);
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}
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}
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return work_done;
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return work_done;
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@@ -10491,7 +10491,7 @@ static int bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
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mb(); /* FW restriction: must not reorder writing nbd and packets */
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mb(); /* FW restriction: must not reorder writing nbd and packets */
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fp->hw_tx_prods->packets_prod =
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fp->hw_tx_prods->packets_prod =
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cpu_to_le32(le32_to_cpu(fp->hw_tx_prods->packets_prod) + 1);
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cpu_to_le32(le32_to_cpu(fp->hw_tx_prods->packets_prod) + 1);
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- DOORBELL(bp, FP_IDX(fp), 0);
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+ DOORBELL(bp, fp->index, 0);
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mmiowb();
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mmiowb();
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