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@@ -537,10 +537,11 @@ struct t3_vpd {
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* addres is written to the control register. The hardware device will
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* set the flag to 1 when 4 bytes have been read into the data register.
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*/
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-int t3_seeprom_read(struct adapter *adapter, u32 addr, u32 *data)
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+int t3_seeprom_read(struct adapter *adapter, u32 addr, __le32 *data)
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{
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u16 val;
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int attempts = EEPROM_MAX_POLL;
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+ u32 v;
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unsigned int base = adapter->params.pci.vpd_cap_addr;
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if ((addr >= EEPROMSIZE && addr != EEPROM_STAT_ADDR) || (addr & 3))
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@@ -556,8 +557,8 @@ int t3_seeprom_read(struct adapter *adapter, u32 addr, u32 *data)
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CH_ERR(adapter, "reading EEPROM address 0x%x failed\n", addr);
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return -EIO;
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}
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- pci_read_config_dword(adapter->pdev, base + PCI_VPD_DATA, data);
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- *data = le32_to_cpu(*data);
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+ pci_read_config_dword(adapter->pdev, base + PCI_VPD_DATA, &v);
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+ *data = cpu_to_le32(v);
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return 0;
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}
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@@ -570,7 +571,7 @@ int t3_seeprom_read(struct adapter *adapter, u32 addr, u32 *data)
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* Write a 32-bit word to a location in VPD EEPROM using the card's PCI
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* VPD ROM capability.
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*/
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-int t3_seeprom_write(struct adapter *adapter, u32 addr, u32 data)
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+int t3_seeprom_write(struct adapter *adapter, u32 addr, __le32 data)
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{
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u16 val;
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int attempts = EEPROM_MAX_POLL;
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@@ -580,7 +581,7 @@ int t3_seeprom_write(struct adapter *adapter, u32 addr, u32 data)
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return -EINVAL;
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pci_write_config_dword(adapter->pdev, base + PCI_VPD_DATA,
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- cpu_to_le32(data));
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+ le32_to_cpu(data));
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pci_write_config_word(adapter->pdev,base + PCI_VPD_ADDR,
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addr | PCI_VPD_ADDR_F);
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do {
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@@ -631,14 +632,14 @@ static int get_vpd_params(struct adapter *adapter, struct vpd_params *p)
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* Card information is normally at VPD_BASE but some early cards had
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* it at 0.
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*/
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- ret = t3_seeprom_read(adapter, VPD_BASE, (u32 *)&vpd);
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+ ret = t3_seeprom_read(adapter, VPD_BASE, (__le32 *)&vpd);
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if (ret)
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return ret;
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addr = vpd.id_tag == 0x82 ? VPD_BASE : 0;
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for (i = 0; i < sizeof(vpd); i += 4) {
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ret = t3_seeprom_read(adapter, addr + i,
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- (u32 *)((u8 *)&vpd + i));
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+ (__le32 *)((u8 *)&vpd + i));
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if (ret)
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return ret;
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}
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@@ -926,7 +927,7 @@ int t3_check_tpsram(struct adapter *adapter, u8 *tp_sram, unsigned int size)
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{
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u32 csum;
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unsigned int i;
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- const u32 *p = (const u32 *)tp_sram;
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+ const __be32 *p = (const __be32 *)tp_sram;
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/* Verify checksum */
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for (csum = 0, i = 0; i < size / sizeof(csum); i++)
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@@ -1040,7 +1041,7 @@ int t3_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size)
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{
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u32 csum;
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unsigned int i;
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- const u32 *p = (const u32 *)fw_data;
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+ const __be32 *p = (const __be32 *)fw_data;
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int ret, addr, fw_sector = FW_FLASH_BOOT_ADDR >> 16;
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if ((size & 3) || size < FW_MIN_SIZE)
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@@ -2877,14 +2878,14 @@ static void ulp_config(struct adapter *adap, const struct tp_params *p)
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int t3_set_proto_sram(struct adapter *adap, u8 *data)
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{
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int i;
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- u32 *buf = (u32 *)data;
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+ __be32 *buf = (__be32 *)data;
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for (i = 0; i < PROTO_SRAM_LINES; i++) {
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- t3_write_reg(adap, A_TP_EMBED_OP_FIELD5, cpu_to_be32(*buf++));
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- t3_write_reg(adap, A_TP_EMBED_OP_FIELD4, cpu_to_be32(*buf++));
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- t3_write_reg(adap, A_TP_EMBED_OP_FIELD3, cpu_to_be32(*buf++));
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- t3_write_reg(adap, A_TP_EMBED_OP_FIELD2, cpu_to_be32(*buf++));
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- t3_write_reg(adap, A_TP_EMBED_OP_FIELD1, cpu_to_be32(*buf++));
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+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD5, be32_to_cpu(*buf++));
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+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD4, be32_to_cpu(*buf++));
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+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD3, be32_to_cpu(*buf++));
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+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD2, be32_to_cpu(*buf++));
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+ t3_write_reg(adap, A_TP_EMBED_OP_FIELD1, be32_to_cpu(*buf++));
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t3_write_reg(adap, A_TP_EMBED_OP_FIELD0, i << 1 | 1 << 31);
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if (t3_wait_op_done(adap, A_TP_EMBED_OP_FIELD0, 1, 1, 5, 1))
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