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@@ -160,6 +160,14 @@
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#define OMAP343X_CONTROL_SRAMLDO5 (OMAP2_CONTROL_GENERAL + 0x02C0)
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#define OMAP343X_CONTROL_CSI (OMAP2_CONTROL_GENERAL + 0x02C4)
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+/* AM35XX only CONTROL_GENERAL register offsets */
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+#define AM35XX_CONTROL_MSUSPENDMUX_6 (OMAP2_CONTROL_GENERAL + 0x0038)
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+#define AM35XX_CONTROL_DEVCONF2 (OMAP2_CONTROL_GENERAL + 0x0310)
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+#define AM35XX_CONTROL_DEVCONF3 (OMAP2_CONTROL_GENERAL + 0x0314)
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+#define AM35XX_CONTROL_CBA_PRIORITY (OMAP2_CONTROL_GENERAL + 0x0320)
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+#define AM35XX_CONTROL_LVL_INTR_CLEAR (OMAP2_CONTROL_GENERAL + 0x0324)
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+#define AM35XX_CONTROL_IP_SW_RESET (OMAP2_CONTROL_GENERAL + 0x0328)
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+#define AM35XX_CONTROL_IPSS_CLK_CTRL (OMAP2_CONTROL_GENERAL + 0x032C)
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/* 34xx PADCONF register offsets */
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#define OMAP343X_PADCONF_ETK(i) (OMAP2_CONTROL_PADCONFS + 0x5a8 + \
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@@ -257,6 +265,15 @@
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#define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910)
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#define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C
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+/* AM35XX_CONTROL_IPSS_CLK_CTRL bits */
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+#define AM35XX_USBOTG_VBUSP_CLK_SHIFT 0
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+#define AM35XX_CPGMAC_VBUSP_CLK_SHIFT 1
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+#define AM35XX_VPFE_VBUSP_CLK_SHIFT 2
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+#define AM35XX_HECC_VBUSP_CLK_SHIFT 3
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+#define AM35XX_USBOTG_FCLK_SHIFT 8
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+#define AM35XX_CPGMAC_FCLK_SHIFT 9
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+#define AM35XX_VPFE_FCLK_SHIFT 10
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+
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/*
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* CONTROL OMAP STATUS register to identify OMAP3 features
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*/
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