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@@ -73,6 +73,27 @@ u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst,
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return v;
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}
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+u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, s16 inst, s16 idx)
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+{
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+ return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx);
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+}
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+
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+u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, s16 idx)
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+{
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+ return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx);
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+}
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+
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+u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
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+{
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+ u32 v;
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+
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+ v = omap4_cminst_read_inst_reg(part, inst, idx);
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+ v &= mask;
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+ v >>= __ffs(mask);
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+
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+ return v;
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+}
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+
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/*
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*
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*/
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