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@@ -1855,12 +1855,45 @@ static const unsigned int eth_rmii_mux[] = {
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ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK,
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ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REF_CLK_MARK,
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};
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+/* - INTC ------------------------------------------------------------------- */
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+static const unsigned int intc_irq0_pins[] = {
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+ /* IRQ */
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+ RCAR_GP_PIN(1, 25),
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+};
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+static const unsigned int intc_irq0_mux[] = {
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+ IRQ0_MARK,
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+};
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+static const unsigned int intc_irq1_pins[] = {
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+ /* IRQ */
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+ RCAR_GP_PIN(1, 27),
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+};
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+static const unsigned int intc_irq1_mux[] = {
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+ IRQ1_MARK,
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+};
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+static const unsigned int intc_irq2_pins[] = {
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+ /* IRQ */
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+ RCAR_GP_PIN(1, 29),
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+};
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+static const unsigned int intc_irq2_mux[] = {
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+ IRQ2_MARK,
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+};
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+static const unsigned int intc_irq3_pins[] = {
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+ /* IRQ */
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+ RCAR_GP_PIN(1, 23),
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+};
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+static const unsigned int intc_irq3_mux[] = {
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+ IRQ3_MARK,
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+};
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(eth_link),
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SH_PFC_PIN_GROUP(eth_magic),
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SH_PFC_PIN_GROUP(eth_mdio),
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SH_PFC_PIN_GROUP(eth_rmii),
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+ SH_PFC_PIN_GROUP(intc_irq0),
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+ SH_PFC_PIN_GROUP(intc_irq1),
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+ SH_PFC_PIN_GROUP(intc_irq2),
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+ SH_PFC_PIN_GROUP(intc_irq3),
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};
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static const char * const eth_groups[] = {
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@@ -1870,8 +1903,15 @@ static const char * const eth_groups[] = {
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"eth_rmii",
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};
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+static const char * const intc_groups[] = {
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+ "intc_irq0",
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+ "intc_irq1",
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+ "intc_irq2",
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+ "intc_irq3",
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+};
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(eth),
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+ SH_PFC_FUNCTION(intc),
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};
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#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
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