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@@ -39,6 +39,7 @@ enum {
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PCH_UART_HANDLED_RX_ERR_INT_SHIFT,
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PCH_UART_HANDLED_RX_TRG_INT_SHIFT,
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PCH_UART_HANDLED_MS_INT_SHIFT,
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+ PCH_UART_HANDLED_LS_INT_SHIFT,
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};
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enum {
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@@ -63,6 +64,8 @@ enum {
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PCH_UART_HANDLED_RX_TRG_INT_SHIFT)<<1))
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#define PCH_UART_HANDLED_MS_INT (1<<((PCH_UART_HANDLED_MS_INT_SHIFT)<<1))
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+#define PCH_UART_HANDLED_LS_INT (1<<((PCH_UART_HANDLED_LS_INT_SHIFT)<<1))
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+
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#define PCH_UART_RBR 0x00
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#define PCH_UART_THR 0x00
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@@ -1058,6 +1061,8 @@ static irqreturn_t pch_uart_interrupt(int irq, void *dev_id)
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UART_LSR_PE | UART_LSR_OE)) {
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pch_uart_err_ir(priv, lsr);
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ret = PCH_UART_HANDLED_RX_ERR_INT;
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+ } else {
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+ ret = PCH_UART_HANDLED_LS_INT;
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}
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break;
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case PCH_UART_IID_RDR: /* Received Data Ready */
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