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@@ -26,6 +26,7 @@
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#include <mach/time.h>
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#include <mach/da8xx.h>
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#include <mach/cpufreq.h>
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+#include <mach/pm.h>
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#include "clock.h"
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#include "mux.h"
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@@ -536,6 +537,7 @@ static const struct mux_config da850_pins[] = {
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MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
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MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false)
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MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false)
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+ MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false)
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#endif
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};
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@@ -1029,6 +1031,43 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate)
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}
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#endif
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+int da850_register_pm(struct platform_device *pdev)
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+{
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+ int ret;
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+ struct davinci_pm_config *pdata = pdev->dev.platform_data;
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+
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+ ret = davinci_cfg_reg(DA850_RTC_ALARM);
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+ if (ret)
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+ return ret;
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+
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+ pdata->ddr2_ctlr_base = da8xx_get_mem_ctlr();
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+ pdata->deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG);
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+ pdata->ddrpsc_num = DA8XX_LPSC1_EMIF3C;
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+
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+ pdata->cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K);
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+ if (!pdata->cpupll_reg_base)
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+ return -ENOMEM;
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+
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+ pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K);
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+ if (!pdata->ddrpll_reg_base) {
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+ ret = -ENOMEM;
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+ goto no_ddrpll_mem;
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+ }
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+
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+ pdata->ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K);
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+ if (!pdata->ddrpsc_reg_base) {
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+ ret = -ENOMEM;
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+ goto no_ddrpsc_mem;
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+ }
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+
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+ return platform_device_register(pdev);
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+
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+no_ddrpsc_mem:
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+ iounmap(pdata->ddrpll_reg_base);
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+no_ddrpll_mem:
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+ iounmap(pdata->cpupll_reg_base);
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+ return ret;
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+}
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static struct davinci_soc_info davinci_soc_info_da850 = {
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.io_desc = da850_io_desc,
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