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@@ -183,49 +183,58 @@ static void b43_radio_init2055_pre(struct b43_wldev *dev)
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static void b43_radio_init2055_post(struct b43_wldev *dev)
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{
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+ struct b43_phy_n *nphy = dev->phy.n;
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struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
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struct ssb_boardinfo *binfo = &(dev->dev->bus->boardinfo);
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int i;
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u16 val;
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+ bool workaround = false;
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+
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+ if (sprom->revision < 4)
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+ workaround = (binfo->vendor != PCI_VENDOR_ID_BROADCOM ||
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+ binfo->type != 0x46D ||
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+ binfo->rev < 0x41);
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+ else
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+ workaround = ((sprom->boardflags_hi & B43_BFH_NOPA) == 0);
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b43_radio_mask(dev, B2055_MASTER1, 0xFFF3);
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- msleep(1);
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- if ((sprom->revision != 4) ||
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- !(sprom->boardflags_hi & B43_BFH_RSSIINV)) {
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- if ((binfo->vendor != PCI_VENDOR_ID_BROADCOM) ||
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- (binfo->type != 0x46D) ||
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- (binfo->rev < 0x41)) {
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- b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F);
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- b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F);
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- msleep(1);
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- }
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+ if (workaround) {
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+ b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F);
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+ b43_radio_mask(dev, B2055_C2_RX_BB_REG, 0x7F);
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}
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- b43_radio_maskset(dev, B2055_RRCCAL_NOPTSEL, 0x3F, 0x2C);
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- msleep(1);
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- b43_radio_write16(dev, B2055_CAL_MISC, 0x3C);
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- msleep(1);
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+ b43_radio_maskset(dev, B2055_RRCCAL_NOPTSEL, 0xFFC0, 0x2C);
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+ b43_radio_write(dev, B2055_CAL_MISC, 0x3C);
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b43_radio_mask(dev, B2055_CAL_MISC, 0xFFBE);
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- msleep(1);
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b43_radio_set(dev, B2055_CAL_LPOCTL, 0x80);
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- msleep(1);
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b43_radio_set(dev, B2055_CAL_MISC, 0x1);
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msleep(1);
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b43_radio_set(dev, B2055_CAL_MISC, 0x40);
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- msleep(1);
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- for (i = 0; i < 100; i++) {
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- val = b43_radio_read16(dev, B2055_CAL_COUT2);
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- if (val & 0x80)
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+ for (i = 0; i < 200; i++) {
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+ val = b43_radio_read(dev, B2055_CAL_COUT2);
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+ if (val & 0x80) {
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+ i = 0;
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break;
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+ }
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udelay(10);
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}
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- msleep(1);
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+ if (i)
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+ b43err(dev->wl, "radio post init timeout\n");
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b43_radio_mask(dev, B2055_CAL_LPOCTL, 0xFF7F);
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- msleep(1);
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nphy_channel_switch(dev, dev->phy.channel);
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- b43_radio_write16(dev, B2055_C1_RX_BB_LPF, 0x9);
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- b43_radio_write16(dev, B2055_C2_RX_BB_LPF, 0x9);
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- b43_radio_write16(dev, B2055_C1_RX_BB_MIDACHP, 0x83);
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- b43_radio_write16(dev, B2055_C2_RX_BB_MIDACHP, 0x83);
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+ b43_radio_write(dev, B2055_C1_RX_BB_LPF, 0x9);
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+ b43_radio_write(dev, B2055_C2_RX_BB_LPF, 0x9);
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+ b43_radio_write(dev, B2055_C1_RX_BB_MIDACHP, 0x83);
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+ b43_radio_write(dev, B2055_C2_RX_BB_MIDACHP, 0x83);
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+ b43_radio_maskset(dev, B2055_C1_LNA_GAINBST, 0xFFF8, 0x6);
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+ b43_radio_maskset(dev, B2055_C2_LNA_GAINBST, 0xFFF8, 0x6);
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+ if (!nphy->gain_boost) {
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+ b43_radio_set(dev, B2055_C1_RX_RFSPC1, 0x2);
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+ b43_radio_set(dev, B2055_C2_RX_RFSPC1, 0x2);
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+ } else {
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+ b43_radio_mask(dev, B2055_C1_RX_RFSPC1, 0xFFFD);
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+ b43_radio_mask(dev, B2055_C2_RX_RFSPC1, 0xFFFD);
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+ }
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+ udelay(2);
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}
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/*
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