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@@ -42,34 +42,6 @@
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* and will provide a way to read 32/64 bit memory mapped registers in
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* all ABIs
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*/
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-/*
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- * For o32 compilation, we have to disable interrupts and enable KX bit to
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- * access 64 bit addresses or data.
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- *
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- * We need to disable interrupts because we save just the lower 32 bits of
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- * registers in interrupt handling. So if we get hit by an interrupt while
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- * using the upper 32 bits of a register, we lose.
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- */
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-static inline uint32_t nlm_save_flags_kx(void)
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-{
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- return change_c0_status(ST0_KX | ST0_IE, ST0_KX);
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-}
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-
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-static inline uint32_t nlm_save_flags_cop2(void)
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-{
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- return change_c0_status(ST0_CU2 | ST0_IE, ST0_CU2);
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-}
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-
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-static inline void nlm_restore_flags(uint32_t sr)
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-{
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- write_c0_status(sr);
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-}
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-
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-/*
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- * The n64 implementations are simple, the o32 implementations when they
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- * are added, will have to disable interrupts and enable KX before doing
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- * 64 bit ops.
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- */
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static inline uint32_t
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nlm_read_reg(uint64_t base, uint32_t reg)
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{
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@@ -187,14 +159,6 @@ nlm_pcicfg_base(uint32_t devoffset)
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return nlm_io_base + devoffset;
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}
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-static inline uint64_t
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-nlm_xkphys_map_pcibar0(uint64_t pcibase)
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-{
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- uint64_t paddr;
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-
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- paddr = nlm_read_reg(pcibase, 0x4) & ~0xfu;
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- return (uint64_t)0x9000000000000000 | paddr;
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-}
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#elif defined(CONFIG_CPU_XLR)
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static inline uint64_t
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