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@@ -10,12 +10,16 @@
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* your option) any later version.
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*/
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+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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+
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/m48t86.h>
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#include <linux/mtd/physmap.h>
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+#include <linux/mtd/nand.h>
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+#include <linux/mtd/partitions.h>
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#include <mach/hardware.h>
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#include <mach/ts72xx.h>
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@@ -54,92 +58,162 @@ static struct map_desc ts72xx_io_desc[] __initdata = {
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}
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};
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-static struct map_desc ts72xx_nand_io_desc[] __initdata = {
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- {
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- .virtual = TS72XX_NAND_DATA_VIRT_BASE,
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- .pfn = __phys_to_pfn(TS72XX_NAND1_DATA_PHYS_BASE),
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- .length = TS72XX_NAND_DATA_SIZE,
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- .type = MT_DEVICE,
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- }, {
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- .virtual = TS72XX_NAND_CONTROL_VIRT_BASE,
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- .pfn = __phys_to_pfn(TS72XX_NAND1_CONTROL_PHYS_BASE),
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- .length = TS72XX_NAND_CONTROL_SIZE,
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- .type = MT_DEVICE,
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- }, {
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- .virtual = TS72XX_NAND_BUSY_VIRT_BASE,
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- .pfn = __phys_to_pfn(TS72XX_NAND1_BUSY_PHYS_BASE),
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- .length = TS72XX_NAND_BUSY_SIZE,
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- .type = MT_DEVICE,
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+static void __init ts72xx_map_io(void)
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+{
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+ ep93xx_map_io();
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+ iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
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+}
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+
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+
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+/*************************************************************************
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+ * NAND flash
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+ *************************************************************************/
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+#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
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+#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
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+
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+static void ts72xx_nand_hwcontrol(struct mtd_info *mtd,
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+ int cmd, unsigned int ctrl)
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+{
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+ struct nand_chip *chip = mtd->priv;
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+
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+ if (ctrl & NAND_CTRL_CHANGE) {
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+ void __iomem *addr = chip->IO_ADDR_R;
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+ unsigned char bits;
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+
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+ addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
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+
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+ bits = __raw_readb(addr) & ~0x07;
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+ bits |= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
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+ bits |= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */
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+ bits |= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
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+
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+ __raw_writeb(bits, addr);
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}
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-};
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-static struct map_desc ts72xx_alternate_nand_io_desc[] __initdata = {
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+ if (cmd != NAND_CMD_NONE)
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+ __raw_writeb(cmd, chip->IO_ADDR_W);
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+}
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+
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+static int ts72xx_nand_device_ready(struct mtd_info *mtd)
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+{
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+ struct nand_chip *chip = mtd->priv;
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+ void __iomem *addr = chip->IO_ADDR_R;
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+
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+ addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
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+
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+ return !!(__raw_readb(addr) & 0x20);
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+}
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+
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+static const char *ts72xx_nand_part_probes[] = { "cmdlinepart", NULL };
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+
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+#define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
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+#define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
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+
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+static struct mtd_partition ts72xx_nand_parts[] = {
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{
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- .virtual = TS72XX_NAND_DATA_VIRT_BASE,
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- .pfn = __phys_to_pfn(TS72XX_NAND2_DATA_PHYS_BASE),
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- .length = TS72XX_NAND_DATA_SIZE,
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- .type = MT_DEVICE,
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+ .name = "TS-BOOTROM",
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+ .offset = 0,
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+ .size = TS72XX_BOOTROM_PART_SIZE,
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+ .mask_flags = MTD_WRITEABLE, /* force read-only */
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}, {
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- .virtual = TS72XX_NAND_CONTROL_VIRT_BASE,
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- .pfn = __phys_to_pfn(TS72XX_NAND2_CONTROL_PHYS_BASE),
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- .length = TS72XX_NAND_CONTROL_SIZE,
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- .type = MT_DEVICE,
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+ .name = "Linux",
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+ .offset = MTDPART_OFS_APPEND,
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+ .size = 0, /* filled in later */
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}, {
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- .virtual = TS72XX_NAND_BUSY_VIRT_BASE,
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- .pfn = __phys_to_pfn(TS72XX_NAND2_BUSY_PHYS_BASE),
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- .length = TS72XX_NAND_BUSY_SIZE,
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- .type = MT_DEVICE,
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- }
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+ .name = "RedBoot",
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+ .offset = MTDPART_OFS_APPEND,
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+ .size = MTDPART_SIZ_FULL,
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+ .mask_flags = MTD_WRITEABLE, /* force read-only */
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+ },
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};
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-static void __init ts72xx_map_io(void)
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+static void ts72xx_nand_set_parts(uint64_t size,
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+ struct platform_nand_chip *chip)
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{
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- ep93xx_map_io();
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- iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
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+ /* Factory TS-72xx boards only come with 32MiB or 128MiB NAND options */
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+ if (size == SZ_32M || size == SZ_128M) {
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+ /* Set the "Linux" partition size */
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+ ts72xx_nand_parts[1].size = size - TS72XX_REDBOOT_PART_SIZE;
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- /*
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- * The TS-7200 has NOR flash, the other models have NAND flash.
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- */
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- if (!board_is_ts7200()) {
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- if (is_ts9420_installed()) {
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- iotable_init(ts72xx_alternate_nand_io_desc,
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- ARRAY_SIZE(ts72xx_alternate_nand_io_desc));
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- } else {
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- iotable_init(ts72xx_nand_io_desc,
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- ARRAY_SIZE(ts72xx_nand_io_desc));
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- }
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+ chip->partitions = ts72xx_nand_parts;
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+ chip->nr_partitions = ARRAY_SIZE(ts72xx_nand_parts);
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+ } else {
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+ pr_warning("Unknown nand disk size:%lluMiB\n", size >> 20);
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}
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}
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+static struct platform_nand_data ts72xx_nand_data = {
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+ .chip = {
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+ .nr_chips = 1,
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+ .chip_offset = 0,
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+ .chip_delay = 15,
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+ .part_probe_types = ts72xx_nand_part_probes,
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+ .set_parts = ts72xx_nand_set_parts,
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+ },
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+ .ctrl = {
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+ .cmd_ctrl = ts72xx_nand_hwcontrol,
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+ .dev_ready = ts72xx_nand_device_ready,
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+ },
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+};
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+
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+static struct resource ts72xx_nand_resource[] = {
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+ {
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+ .start = 0, /* filled in later */
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+ .end = 0, /* filled in later */
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+
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+static struct platform_device ts72xx_nand_flash = {
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+ .name = "gen_nand",
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+ .id = -1,
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+ .dev.platform_data = &ts72xx_nand_data,
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+ .resource = ts72xx_nand_resource,
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+ .num_resources = ARRAY_SIZE(ts72xx_nand_resource),
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+};
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+
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+
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/*************************************************************************
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* NOR flash (TS-7200 only)
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*************************************************************************/
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-static struct physmap_flash_data ts72xx_flash_data = {
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+static struct physmap_flash_data ts72xx_nor_data = {
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.width = 2,
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};
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-static struct resource ts72xx_flash_resource = {
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+static struct resource ts72xx_nor_resource = {
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.start = EP93XX_CS6_PHYS_BASE,
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.end = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
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.flags = IORESOURCE_MEM,
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};
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-static struct platform_device ts72xx_flash = {
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- .name = "physmap-flash",
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- .id = 0,
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- .dev = {
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- .platform_data = &ts72xx_flash_data,
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- },
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- .num_resources = 1,
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- .resource = &ts72xx_flash_resource,
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+static struct platform_device ts72xx_nor_flash = {
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+ .name = "physmap-flash",
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+ .id = 0,
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+ .dev.platform_data = &ts72xx_nor_data,
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+ .resource = &ts72xx_nor_resource,
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+ .num_resources = 1,
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};
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static void __init ts72xx_register_flash(void)
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{
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- if (board_is_ts7200())
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- platform_device_register(&ts72xx_flash);
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+ if (board_is_ts7200()) {
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+ platform_device_register(&ts72xx_nor_flash);
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+ } else {
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+ resource_size_t start;
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+
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+ if (is_ts9420_installed())
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+ start = EP93XX_CS7_PHYS_BASE;
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+ else
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+ start = EP93XX_CS6_PHYS_BASE;
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+
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+ ts72xx_nand_resource[0].start = start;
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+ ts72xx_nand_resource[0].end = start + SZ_16M - 1;
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+
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+ platform_device_register(&ts72xx_nand_flash);
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+ }
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}
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+
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static unsigned char ts72xx_rtc_readbyte(unsigned long addr)
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{
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__raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
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