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@@ -62,6 +62,10 @@
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*****************************************************************************/
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#include "iwl-dev.h"
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#include "iwl-trans.h"
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+#include "iwl-core.h"
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+#include "iwl-helpers.h"
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+/*TODO remove uneeded includes when the transport layer tx_free will be here */
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+#include "iwl-agn.h"
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static int iwl_trans_rx_alloc(struct iwl_priv *priv)
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{
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@@ -184,9 +188,233 @@ static void iwl_trans_rx_free(struct iwl_priv *priv)
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rxq->rb_stts = NULL;
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}
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+/* TODO:remove this code duplication */
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+static inline int iwlagn_alloc_dma_ptr(struct iwl_priv *priv,
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+ struct iwl_dma_ptr *ptr, size_t size)
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+{
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+ if (WARN_ON(ptr->addr))
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+ return -EINVAL;
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+
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+ ptr->addr = dma_alloc_coherent(priv->bus.dev, size,
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+ &ptr->dma, GFP_KERNEL);
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+ if (!ptr->addr)
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+ return -ENOMEM;
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+ ptr->size = size;
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+ return 0;
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+}
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+
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+static int iwl_trans_txq_alloc(struct iwl_priv *priv, struct iwl_tx_queue *txq,
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+ int slots_num, u32 txq_id)
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+{
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+ size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
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+ int i;
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+
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+ if (WARN_ON(txq->meta || txq->cmd || txq->txb || txq->tfds))
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+ return -EINVAL;
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+
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+ txq->meta = kzalloc(sizeof(txq->meta[0]) * slots_num,
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+ GFP_KERNEL);
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+ txq->cmd = kzalloc(sizeof(txq->cmd[0]) * slots_num,
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+ GFP_KERNEL);
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+
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+ if (!txq->meta || !txq->cmd)
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+ goto error;
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+
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+ for (i = 0; i < slots_num; i++) {
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+ txq->cmd[i] = kmalloc(sizeof(struct iwl_device_cmd),
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+ GFP_KERNEL);
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+ if (!txq->cmd[i])
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+ goto error;
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+ }
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+
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+ /* Alloc driver data array and TFD circular buffer */
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+ /* Driver private data, only for Tx (not command) queues,
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+ * not shared with device. */
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+ if (txq_id != priv->cmd_queue) {
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+ txq->txb = kzalloc(sizeof(txq->txb[0]) *
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+ TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
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+ if (!txq->txb) {
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+ IWL_ERR(priv, "kmalloc for auxiliary BD "
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+ "structures failed\n");
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+ goto error;
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+ }
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+ } else {
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+ txq->txb = NULL;
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+ }
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+
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+ /* Circular buffer of transmit frame descriptors (TFDs),
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+ * shared with device */
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+ txq->tfds = dma_alloc_coherent(priv->bus.dev, tfd_sz, &txq->q.dma_addr,
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+ GFP_KERNEL);
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+ if (!txq->tfds) {
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+ IWL_ERR(priv, "dma_alloc_coherent(%zd) failed\n", tfd_sz);
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+ goto error;
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+ }
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+ txq->q.id = txq_id;
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+
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+ return 0;
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+error:
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+ kfree(txq->txb);
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+ txq->txb = NULL;
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+ /* since txq->cmd has been zeroed,
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+ * all non allocated cmd[i] will be NULL */
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+ if (txq->cmd)
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+ for (i = 0; i < slots_num; i++)
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+ kfree(txq->cmd[i]);
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+ kfree(txq->meta);
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+ kfree(txq->cmd);
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+ txq->meta = NULL;
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+ txq->cmd = NULL;
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+
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+ return -ENOMEM;
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+
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+}
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+
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+static int iwl_trans_txq_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
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+ int slots_num, u32 txq_id)
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+{
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+ int ret;
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+
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+ txq->need_update = 0;
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+ memset(txq->meta, 0, sizeof(txq->meta[0]) * slots_num);
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+
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+ /*
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+ * For the default queues 0-3, set up the swq_id
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+ * already -- all others need to get one later
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+ * (if they need one at all).
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+ */
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+ if (txq_id < 4)
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+ iwl_set_swq_id(txq, txq_id, txq_id);
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+
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+ /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
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+ * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
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+ BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
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+
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+ /* Initialize queue's high/low-water marks, and head/tail indexes */
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+ ret = iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num,
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+ txq_id);
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+ if (ret)
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+ return ret;
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+
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+ /*
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+ * Tell nic where to find circular buffer of Tx Frame Descriptors for
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+ * given Tx queue, and enable the DMA channel used for that queue.
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+ * Circular buffer (TFD queue in DRAM) physical base address */
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+ iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
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+ txq->q.dma_addr >> 8);
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+
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+ return 0;
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+}
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+
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+/**
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+ * iwl_trans_tx_alloc - allocate TX context
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+ * Allocate all Tx DMA structures and initialize them
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+ *
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+ * @param priv
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+ * @return error code
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+ */
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+static int iwl_trans_tx_alloc(struct iwl_priv *priv)
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+{
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+ int ret;
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+ int txq_id, slots_num;
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+
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+ /*It is not allowed to alloc twice, so warn when this happens.
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+ * We cannot rely on the previous allocation, so free and fail */
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+ if (WARN_ON(priv->txq)) {
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+ ret = -EINVAL;
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+ goto error;
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+ }
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+
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+ ret = iwlagn_alloc_dma_ptr(priv, &priv->scd_bc_tbls,
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+ priv->hw_params.scd_bc_tbls_size);
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+ if (ret) {
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+ IWL_ERR(priv, "Scheduler BC Table allocation failed\n");
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+ goto error;
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+ }
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+
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+ /* Alloc keep-warm buffer */
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+ ret = iwlagn_alloc_dma_ptr(priv, &priv->kw, IWL_KW_SIZE);
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+ if (ret) {
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+ IWL_ERR(priv, "Keep Warm allocation failed\n");
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+ goto error;
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+ }
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+
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+ priv->txq = kzalloc(sizeof(struct iwl_tx_queue) *
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+ priv->cfg->base_params->num_of_queues, GFP_KERNEL);
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+ if (!priv->txq) {
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+ IWL_ERR(priv, "Not enough memory for txq\n");
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+ ret = ENOMEM;
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+ goto error;
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+ }
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+
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+ /* Alloc and init all Tx queues, including the command queue (#4/#9) */
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+ for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
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+ slots_num = (txq_id == priv->cmd_queue) ?
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+ TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
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+ ret = iwl_trans_txq_alloc(priv, &priv->txq[txq_id], slots_num,
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+ txq_id);
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+ if (ret) {
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+ IWL_ERR(priv, "Tx %d queue alloc failed\n", txq_id);
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+ goto error;
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+ }
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+ }
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+
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+ return 0;
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+
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+error:
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+ iwlagn_hw_txq_ctx_free(priv);
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+
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+ return ret;
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+}
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+static int iwl_trans_tx_init(struct iwl_priv *priv)
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+{
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+ int ret;
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+ int txq_id, slots_num;
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+ unsigned long flags;
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+ bool alloc = false;
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+
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+ if (!priv->txq) {
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+ ret = iwl_trans_tx_alloc(priv);
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+ if (ret)
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+ goto error;
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+ alloc = true;
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+ }
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+
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+ spin_lock_irqsave(&priv->lock, flags);
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+
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+ /* Turn off all Tx DMA fifos */
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+ iwl_write_prph(priv, IWLAGN_SCD_TXFACT, 0);
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+
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+ /* Tell NIC where to find the "keep warm" buffer */
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+ iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4);
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+
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+ spin_unlock_irqrestore(&priv->lock, flags);
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+
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+ /* Alloc and init all Tx queues, including the command queue (#4/#9) */
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+ for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
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+ slots_num = (txq_id == priv->cmd_queue) ?
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+ TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
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+ ret = iwl_trans_txq_init(priv, &priv->txq[txq_id], slots_num,
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+ txq_id);
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+ if (ret) {
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+ IWL_ERR(priv, "Tx %d queue init failed\n", txq_id);
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+ goto error;
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+ }
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+ }
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+
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+ return 0;
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+error:
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+ /*Upon error, free only if we allocated something */
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+ if (alloc)
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+ iwlagn_hw_txq_ctx_free(priv);
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+ return ret;
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+}
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+
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static const struct iwl_trans_ops trans_ops = {
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.rx_init = iwl_trans_rx_init,
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.rx_free = iwl_trans_rx_free,
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+
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+ .tx_init = iwl_trans_tx_init,
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};
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void iwl_trans_register(struct iwl_trans *trans)
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Emmanuel Grumbach