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@@ -11,13 +11,300 @@
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/init.h>
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-#include <asm/es7000/apicdef.h>
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+#include <linux/acpi.h>
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#include <linux/smp.h>
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-#include <asm/es7000/apic.h>
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-#include <asm/es7000/ipi.h>
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-#include <asm/es7000/mpparse.h>
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+#include <asm/ipi.h>
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#include <asm/mach-default/mach_wakecpu.h>
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+#define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER)
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+#define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio)
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+#define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */
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+
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+#define APIC_DFR_VALUE (APIC_DFR_FLAT)
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+
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+extern void es7000_enable_apic_mode(void);
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+extern int apic_version [MAX_APICS];
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+extern u8 cpu_2_logical_apicid[];
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+extern unsigned int boot_cpu_physical_apicid;
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+
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+extern int parse_unisys_oem (char *oemptr);
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+extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
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+extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
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+extern void setup_unisys(void);
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+
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+#define apicid_cluster(apicid) (apicid & 0xF0)
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+#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
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+
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+static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask)
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+{
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+ /* Careful. Some cpus do not strictly honor the set of cpus
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+ * specified in the interrupt destination when using lowest
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+ * priority interrupt delivery mode.
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+ *
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+ * In particular there was a hyperthreading cpu observed to
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+ * deliver interrupts to the wrong hyperthread when only one
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+ * hyperthread was specified in the interrupt desitination.
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+ */
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+ *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
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+}
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+
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+
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+static void es7000_wait_for_init_deassert(atomic_t *deassert)
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+{
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+#ifndef CONFIG_ES7000_CLUSTERED_APIC
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+ while (!atomic_read(deassert))
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+ cpu_relax();
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+#endif
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+ return;
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+}
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+
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+static unsigned int es7000_get_apic_id(unsigned long x)
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+{
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+ return (x >> 24) & 0xFF;
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+}
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+
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+#ifdef CONFIG_ACPI
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+static int es7000_check_dsdt(void)
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+{
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+ struct acpi_table_header header;
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+
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+ if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
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+ !strncmp(header.oem_id, "UNISYS", 6))
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+ return 1;
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+ return 0;
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+}
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+#endif
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+
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+static void es7000_send_IPI_mask(const struct cpumask *mask, int vector)
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+{
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+ default_send_IPI_mask_sequence(mask, vector);
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+}
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+
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+static void es7000_send_IPI_allbutself(int vector)
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+{
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+ default_send_IPI_mask_allbutself(cpu_online_mask, vector);
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+}
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+
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+static void es7000_send_IPI_all(int vector)
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+{
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+ es7000_send_IPI_mask(cpu_online_mask, vector);
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+}
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+
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+static int es7000_apic_id_registered(void)
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+{
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+ return 1;
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+}
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+
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+static const cpumask_t *target_cpus_cluster(void)
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+{
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+ return &CPU_MASK_ALL;
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+}
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+
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+static const cpumask_t *es7000_target_cpus(void)
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+{
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+ return &cpumask_of_cpu(smp_processor_id());
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+}
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+
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+static unsigned long
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+es7000_check_apicid_used(physid_mask_t bitmap, int apicid)
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+{
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+ return 0;
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+}
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+static unsigned long es7000_check_apicid_present(int bit)
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+{
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+ return physid_isset(bit, phys_cpu_present_map);
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+}
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+
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+static unsigned long calculate_ldr(int cpu)
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+{
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+ unsigned long id = xapic_phys_to_log_apicid(cpu);
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+
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+ return (SET_APIC_LOGICAL_ID(id));
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+}
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+
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+/*
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+ * Set up the logical destination ID.
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+ *
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+ * Intel recommends to set DFR, LdR and TPR before enabling
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+ * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
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+ * document number 292116). So here it goes...
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+ */
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+static void es7000_init_apic_ldr_cluster(void)
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+{
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+ unsigned long val;
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+ int cpu = smp_processor_id();
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+
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+ apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
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+ val = calculate_ldr(cpu);
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+ apic_write(APIC_LDR, val);
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+}
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+
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+static void es7000_init_apic_ldr(void)
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+{
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+ unsigned long val;
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+ int cpu = smp_processor_id();
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+
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+ apic_write(APIC_DFR, APIC_DFR_VALUE);
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+ val = calculate_ldr(cpu);
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+ apic_write(APIC_LDR, val);
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+}
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+
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+static void es7000_setup_apic_routing(void)
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+{
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+ int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
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+ printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
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+ (apic_version[apic] == 0x14) ?
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+ "Physical Cluster" : "Logical Cluster",
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+ nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
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+}
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+
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+static int es7000_apicid_to_node(int logical_apicid)
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+{
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+ return 0;
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+}
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+
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+
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+static int es7000_cpu_present_to_apicid(int mps_cpu)
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+{
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+ if (!mps_cpu)
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+ return boot_cpu_physical_apicid;
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+ else if (mps_cpu < nr_cpu_ids)
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+ return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
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+ else
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+ return BAD_APICID;
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+}
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+
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+static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid)
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+{
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+ static int id = 0;
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+ physid_mask_t mask;
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+
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+ mask = physid_mask_of_physid(id);
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+ ++id;
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+
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+ return mask;
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+}
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+
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+/* Mapping from cpu number to logical apicid */
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+static int es7000_cpu_to_logical_apicid(int cpu)
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+{
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+#ifdef CONFIG_SMP
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+ if (cpu >= nr_cpu_ids)
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+ return BAD_APICID;
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+ return (int)cpu_2_logical_apicid[cpu];
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+#else
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+ return logical_smp_processor_id();
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+#endif
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+}
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+
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+static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map)
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+{
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+ /* For clustered we don't have a good way to do this yet - hack */
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+ return physids_promote(0xff);
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+}
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+
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+static int es7000_check_phys_apicid_present(int cpu_physical_apicid)
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+{
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+ boot_cpu_physical_apicid = read_apic_id();
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+ return (1);
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+}
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+
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+static unsigned int
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+es7000_cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
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+{
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+ int cpus_found = 0;
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+ int num_bits_set;
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+ int apicid;
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+ int cpu;
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+
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+ num_bits_set = cpumask_weight(cpumask);
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+ /* Return id to all */
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+ if (num_bits_set == nr_cpu_ids)
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+ return 0xFF;
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+ /*
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+ * The cpus in the mask must all be on the apic cluster. If are not
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+ * on the same apicid cluster return default value of target_cpus():
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+ */
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+ cpu = cpumask_first(cpumask);
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+ apicid = es7000_cpu_to_logical_apicid(cpu);
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+
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+ while (cpus_found < num_bits_set) {
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+ if (cpumask_test_cpu(cpu, cpumask)) {
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+ int new_apicid = es7000_cpu_to_logical_apicid(cpu);
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+
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+ if (apicid_cluster(apicid) !=
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+ apicid_cluster(new_apicid)) {
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+ printk ("%s: Not a valid mask!\n", __func__);
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+
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+ return 0xFF;
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+ }
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+ apicid = new_apicid;
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+ cpus_found++;
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+ }
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+ cpu++;
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+ }
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+ return apicid;
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+}
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+
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+static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask)
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+{
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+ int cpus_found = 0;
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+ int num_bits_set;
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+ int apicid;
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+ int cpu;
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+
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+ num_bits_set = cpus_weight(*cpumask);
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+ /* Return id to all */
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+ if (num_bits_set == nr_cpu_ids)
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+ return es7000_cpu_to_logical_apicid(0);
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+ /*
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+ * The cpus in the mask must all be on the apic cluster. If are not
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+ * on the same apicid cluster return default value of target_cpus():
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+ */
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+ cpu = first_cpu(*cpumask);
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+ apicid = es7000_cpu_to_logical_apicid(cpu);
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+ while (cpus_found < num_bits_set) {
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+ if (cpu_isset(cpu, *cpumask)) {
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+ int new_apicid = es7000_cpu_to_logical_apicid(cpu);
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+
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+ if (apicid_cluster(apicid) !=
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+ apicid_cluster(new_apicid)) {
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+ printk ("%s: Not a valid mask!\n", __func__);
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+
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+ return es7000_cpu_to_logical_apicid(0);
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+ }
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+ apicid = new_apicid;
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+ cpus_found++;
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+ }
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+ cpu++;
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+ }
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+ return apicid;
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+}
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+
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+static unsigned int
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+es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask,
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+ const struct cpumask *andmask)
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+{
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+ int apicid = es7000_cpu_to_logical_apicid(0);
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+ cpumask_var_t cpumask;
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+
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+ if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
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+ return apicid;
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+
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+ cpumask_and(cpumask, inmask, andmask);
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+ cpumask_and(cpumask, cpumask, cpu_online_mask);
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+ apicid = es7000_cpu_mask_to_apicid(cpumask);
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+
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+ free_cpumask_var(cpumask);
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+
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+ return apicid;
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+}
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+
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+static int es7000_phys_pkg_id(int cpuid_apic, int index_msb)
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+{
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+ return cpuid_apic >> index_msb;
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+}
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+
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void __init es7000_update_genapic_to_cluster(void)
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{
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apic->target_cpus = target_cpus_cluster;
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@@ -80,18 +367,6 @@ static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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}
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#endif
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-static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask)
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-{
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- /* Careful. Some cpus do not strictly honor the set of cpus
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- * specified in the interrupt destination when using lowest
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- * priority interrupt delivery mode.
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- *
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- * In particular there was a hyperthreading cpu observed to
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- * deliver interrupts to the wrong hyperthread when only one
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- * hyperthread was specified in the interrupt desitination.
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- */
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- *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
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-}
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struct genapic apic_es7000 = {
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@@ -140,10 +415,11 @@ struct genapic apic_es7000 = {
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.send_IPI_self = NULL,
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.wakeup_cpu = NULL,
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- .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
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- .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
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- .wait_for_init_deassert = default_wait_for_init_deassert,
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+ .trampoline_phys_low = 0x467,
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+ .trampoline_phys_high = 0x469,
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+
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+ .wait_for_init_deassert = es7000_wait_for_init_deassert,
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/* Nothing to do for most platforms, since cleared by the INIT cycle: */
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.smp_callin_clear_local_apic = NULL,
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Ingo Molnar