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@@ -93,14 +93,14 @@ module_param(yield_on_hlt, bool, S_IRUGO);
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* These 2 parameters are used to config the controls for Pause-Loop Exiting:
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* ple_gap: upper bound on the amount of time between two successive
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* executions of PAUSE in a loop. Also indicate if ple enabled.
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- * According to test, this time is usually small than 41 cycles.
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+ * According to test, this time is usually smaller than 128 cycles.
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* ple_window: upper bound on the amount of time a guest is allowed to execute
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* in a PAUSE loop. Tests indicate that most spinlocks are held for
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* less than 2^12 cycles
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* Time is measured based on a counter that runs at the same rate as the TSC,
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* refer SDM volume 3b section 21.6.13 & 22.1.3.
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*/
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-#define KVM_VMX_DEFAULT_PLE_GAP 41
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+#define KVM_VMX_DEFAULT_PLE_GAP 128
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#define KVM_VMX_DEFAULT_PLE_WINDOW 4096
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static int ple_gap = KVM_VMX_DEFAULT_PLE_GAP;
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module_param(ple_gap, int, S_IRUGO);
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