|
@@ -17,26 +17,26 @@
|
|
|
#include <asm/memory.h>
|
|
|
|
|
|
#define PERIP_GRP2_BASE UL(0xB3000000)
|
|
|
-#define VA_PERIP_GRP2_BASE UL(0xFE000000)
|
|
|
+#define VA_PERIP_GRP2_BASE IOMEM(0xFE000000)
|
|
|
#define MCIF_SDHCI_BASE UL(0xB3000000)
|
|
|
#define SYSRAM0_BASE UL(0xB3800000)
|
|
|
-#define VA_SYSRAM0_BASE UL(0xFE800000)
|
|
|
+#define VA_SYSRAM0_BASE IOMEM(0xFE800000)
|
|
|
#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600)
|
|
|
|
|
|
#define PERIP_GRP1_BASE UL(0xE0000000)
|
|
|
-#define VA_PERIP_GRP1_BASE UL(0xFD000000)
|
|
|
+#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000)
|
|
|
#define UART_BASE UL(0xE0000000)
|
|
|
-#define VA_UART_BASE UL(0xFD000000)
|
|
|
+#define VA_UART_BASE IOMEM(0xFD000000)
|
|
|
#define SSP_BASE UL(0xE0100000)
|
|
|
#define MISC_BASE UL(0xE0700000)
|
|
|
-#define VA_MISC_BASE IOMEM(UL(0xFD700000))
|
|
|
+#define VA_MISC_BASE IOMEM(0xFD700000)
|
|
|
|
|
|
#define A9SM_AND_MPMC_BASE UL(0xEC000000)
|
|
|
-#define VA_A9SM_AND_MPMC_BASE UL(0xFC000000)
|
|
|
+#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000)
|
|
|
|
|
|
/* A9SM peripheral offsets */
|
|
|
#define A9SM_PERIP_BASE UL(0xEC800000)
|
|
|
-#define VA_A9SM_PERIP_BASE UL(0xFC800000)
|
|
|
+#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000)
|
|
|
#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00)
|
|
|
|
|
|
#define L2CC_BASE UL(0xED000000)
|