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@@ -1051,7 +1051,9 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
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* about to occur.
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*/
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if (obj_priv->fence_reg != I915_FENCE_REG_NONE) {
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- list_move_tail(&obj_priv->fence_list,
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+ struct drm_i915_fence_reg *reg =
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+ &dev_priv->fence_regs[obj_priv->fence_reg];
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+ list_move_tail(®->lru_list,
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&dev_priv->mm.fence_list);
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}
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@@ -1577,9 +1579,12 @@ i915_gem_process_flushing_list(struct drm_device *dev,
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i915_gem_object_move_to_active(obj, seqno);
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/* update the fence lru list */
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- if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
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- list_move_tail(&obj_priv->fence_list,
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+ if (obj_priv->fence_reg != I915_FENCE_REG_NONE) {
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+ struct drm_i915_fence_reg *reg =
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+ &dev_priv->fence_regs[obj_priv->fence_reg];
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+ list_move_tail(®->lru_list,
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&dev_priv->mm.fence_list);
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+ }
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trace_i915_gem_object_change_domain(obj,
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obj->read_domains,
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@@ -2485,9 +2490,10 @@ static int i915_find_fence_reg(struct drm_device *dev)
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/* None available, try to steal one or wait for a user to finish */
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i = I915_FENCE_REG_NONE;
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- list_for_each_entry(obj_priv, &dev_priv->mm.fence_list,
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- fence_list) {
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- obj = &obj_priv->base;
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+ list_for_each_entry(reg, &dev_priv->mm.fence_list,
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+ lru_list) {
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+ obj = reg->obj;
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+ obj_priv = to_intel_bo(obj);
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if (obj_priv->pin_count)
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continue;
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@@ -2536,7 +2542,8 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
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/* Just update our place in the LRU if our fence is getting used. */
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if (obj_priv->fence_reg != I915_FENCE_REG_NONE) {
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- list_move_tail(&obj_priv->fence_list, &dev_priv->mm.fence_list);
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+ reg = &dev_priv->fence_regs[obj_priv->fence_reg];
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+ list_move_tail(®->lru_list, &dev_priv->mm.fence_list);
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return 0;
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}
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@@ -2566,7 +2573,7 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
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obj_priv->fence_reg = ret;
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reg = &dev_priv->fence_regs[obj_priv->fence_reg];
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- list_add_tail(&obj_priv->fence_list, &dev_priv->mm.fence_list);
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+ list_add_tail(®->lru_list, &dev_priv->mm.fence_list);
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reg->obj = obj;
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@@ -2598,6 +2605,8 @@ i915_gem_clear_fence_reg(struct drm_gem_object *obj)
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struct drm_device *dev = obj->dev;
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
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+ struct drm_i915_fence_reg *reg =
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+ &dev_priv->fence_regs[obj_priv->fence_reg];
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if (IS_GEN6(dev)) {
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I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 +
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@@ -2616,9 +2625,9 @@ i915_gem_clear_fence_reg(struct drm_gem_object *obj)
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I915_WRITE(fence_reg, 0);
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}
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- dev_priv->fence_regs[obj_priv->fence_reg].obj = NULL;
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+ reg->obj = NULL;
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obj_priv->fence_reg = I915_FENCE_REG_NONE;
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- list_del_init(&obj_priv->fence_list);
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+ list_del_init(®->lru_list);
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}
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/**
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@@ -4489,12 +4498,10 @@ struct drm_gem_object * i915_gem_alloc_object(struct drm_device *dev,
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obj->base.read_domains = I915_GEM_DOMAIN_CPU;
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obj->agp_type = AGP_USER_MEMORY;
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-
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obj->base.driver_private = NULL;
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obj->fence_reg = I915_FENCE_REG_NONE;
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INIT_LIST_HEAD(&obj->list);
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INIT_LIST_HEAD(&obj->gpu_write_list);
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- INIT_LIST_HEAD(&obj->fence_list);
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obj->madv = I915_MADV_WILLNEED;
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trace_i915_gem_object_create(&obj->base);
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@@ -4965,6 +4972,8 @@ i915_gem_load(struct drm_device *dev)
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INIT_LIST_HEAD(&dev_priv->mm.inactive_list);
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INIT_LIST_HEAD(&dev_priv->mm.request_list);
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INIT_LIST_HEAD(&dev_priv->mm.fence_list);
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+ for (i = 0; i < 16; i++)
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+ INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list);
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INIT_DELAYED_WORK(&dev_priv->mm.retire_work,
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i915_gem_retire_work_handler);
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dev_priv->mm.next_gem_seqno = 1;
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