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+/*
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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+ *
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+ * Copyright (C) 2007 Alan Stern
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+ * Copyright (C) 2009 IBM Corporation
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+ */
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+
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+/*
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+ * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
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+ * using the CPU's debug registers.
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+ */
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+
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+#include <linux/irqflags.h>
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+#include <linux/notifier.h>
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+#include <linux/kallsyms.h>
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+#include <linux/kprobes.h>
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+#include <linux/percpu.h>
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+#include <linux/kdebug.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/sched.h>
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+#include <linux/init.h>
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+#include <linux/smp.h>
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+
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+#include <asm/hw_breakpoint.h>
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+#include <asm/processor.h>
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+#include <asm/debugreg.h>
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+
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+/* Unmasked kernel DR7 value */
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+static unsigned long kdr7;
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+
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+/*
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+ * Masks for the bits corresponding to registers DR0 - DR3 in DR7 register.
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+ * Used to clear and verify the status of bits corresponding to DR0 - DR3
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+ */
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+static const unsigned long dr7_masks[HBP_NUM] = {
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+ 0x000f0003, /* LEN0, R/W0, G0, L0 */
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+ 0x00f0000c, /* LEN1, R/W1, G1, L1 */
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+ 0x0f000030, /* LEN2, R/W2, G2, L2 */
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+ 0xf00000c0 /* LEN3, R/W3, G3, L3 */
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+};
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+
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+
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+/*
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+ * Encode the length, type, Exact, and Enable bits for a particular breakpoint
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+ * as stored in debug register 7.
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+ */
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+static unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type)
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+{
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+ unsigned long bp_info;
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+
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+ bp_info = (len | type) & 0xf;
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+ bp_info <<= (DR_CONTROL_SHIFT + drnum * DR_CONTROL_SIZE);
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+ bp_info |= (DR_GLOBAL_ENABLE << (drnum * DR_ENABLE_SIZE)) |
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+ DR_GLOBAL_SLOWDOWN;
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+ return bp_info;
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+}
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+
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+void arch_update_kernel_hw_breakpoint(void *unused)
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+{
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+ struct hw_breakpoint *bp;
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+ int i, cpu = get_cpu();
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+ unsigned long temp_kdr7 = 0;
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+
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+ /* Don't allow debug exceptions while we update the registers */
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+ set_debugreg(0UL, 7);
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+
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+ for (i = hbp_kernel_pos; i < HBP_NUM; i++) {
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+ per_cpu(this_hbp_kernel[i], cpu) = bp = hbp_kernel[i];
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+ if (bp) {
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+ temp_kdr7 |= encode_dr7(i, bp->info.len, bp->info.type);
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+ set_debugreg(bp->info.address, i);
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+ }
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+ }
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+
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+ /* No need to set DR6. Update the debug registers with kernel-space
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+ * breakpoint values from kdr7 and user-space requests from the
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+ * current process
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+ */
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+ kdr7 = temp_kdr7;
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+ set_debugreg(kdr7 | current->thread.debugreg7, 7);
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+ put_cpu_no_resched();
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+}
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+
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+/*
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+ * Install the thread breakpoints in their debug registers.
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+ */
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+void arch_install_thread_hw_breakpoint(struct task_struct *tsk)
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+{
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+ struct thread_struct *thread = &(tsk->thread);
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+
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+ switch (hbp_kernel_pos) {
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+ case 4:
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+ set_debugreg(thread->debugreg[3], 3);
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+ case 3:
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+ set_debugreg(thread->debugreg[2], 2);
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+ case 2:
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+ set_debugreg(thread->debugreg[1], 1);
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+ case 1:
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+ set_debugreg(thread->debugreg[0], 0);
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+ default:
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+ break;
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+ }
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+
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+ /* No need to set DR6 */
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+ set_debugreg((kdr7 | thread->debugreg7), 7);
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+}
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+
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+/*
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+ * Install the debug register values for just the kernel, no thread.
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+ */
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+void arch_uninstall_thread_hw_breakpoint()
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+{
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+ /* Clear the user-space portion of debugreg7 by setting only kdr7 */
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+ set_debugreg(kdr7, 7);
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+
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+}
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+
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+static int get_hbp_len(u8 hbp_len)
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+{
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+ unsigned int len_in_bytes = 0;
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+
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+ switch (hbp_len) {
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+ case HW_BREAKPOINT_LEN_1:
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+ len_in_bytes = 1;
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+ break;
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+ case HW_BREAKPOINT_LEN_2:
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+ len_in_bytes = 2;
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+ break;
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+ case HW_BREAKPOINT_LEN_4:
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+ len_in_bytes = 4;
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+ break;
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+#ifdef CONFIG_X86_64
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+ case HW_BREAKPOINT_LEN_8:
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+ len_in_bytes = 8;
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+ break;
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+#endif
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+ }
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+ return len_in_bytes;
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+}
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+
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+/*
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+ * Check for virtual address in user space.
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+ */
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+int arch_check_va_in_userspace(unsigned long va, u8 hbp_len)
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+{
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+ unsigned int len;
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+
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+ len = get_hbp_len(hbp_len);
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+
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+ return (va <= TASK_SIZE - len);
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+}
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+
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+/*
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+ * Check for virtual address in kernel space.
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+ */
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+int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len)
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+{
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+ unsigned int len;
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+
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+ len = get_hbp_len(hbp_len);
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+
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+ return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
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+}
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+
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+/*
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+ * Store a breakpoint's encoded address, length, and type.
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+ */
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+static int arch_store_info(struct hw_breakpoint *bp, struct task_struct *tsk)
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+{
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+ /*
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+ * User-space requests will always have the address field populated
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+ * Symbol names from user-space are rejected
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+ */
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+ if (tsk && bp->info.name)
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+ return -EINVAL;
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+ /*
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+ * For kernel-addresses, either the address or symbol name can be
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+ * specified.
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+ */
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+ if (bp->info.name)
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+ bp->info.address = (unsigned long)
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+ kallsyms_lookup_name(bp->info.name);
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+ if (bp->info.address)
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+ return 0;
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+ return -EINVAL;
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+}
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+
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+/*
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+ * Validate the arch-specific HW Breakpoint register settings
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+ */
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+int arch_validate_hwbkpt_settings(struct hw_breakpoint *bp,
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+ struct task_struct *tsk)
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+{
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+ unsigned int align;
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+ int ret = -EINVAL;
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+
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+ switch (bp->info.type) {
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+ /*
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+ * Ptrace-refactoring code
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+ * For now, we'll allow instruction breakpoint only for user-space
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+ * addresses
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+ */
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+ case HW_BREAKPOINT_EXECUTE:
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+ if ((!arch_check_va_in_userspace(bp->info.address,
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+ bp->info.len)) &&
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+ bp->info.len != HW_BREAKPOINT_LEN_EXECUTE)
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+ return ret;
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+ break;
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+ case HW_BREAKPOINT_WRITE:
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+ break;
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+ case HW_BREAKPOINT_RW:
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+ break;
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+ default:
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+ return ret;
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+ }
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+
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+ switch (bp->info.len) {
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+ case HW_BREAKPOINT_LEN_1:
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+ align = 0;
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+ break;
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+ case HW_BREAKPOINT_LEN_2:
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+ align = 1;
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+ break;
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+ case HW_BREAKPOINT_LEN_4:
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+ align = 3;
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+ break;
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+#ifdef CONFIG_X86_64
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+ case HW_BREAKPOINT_LEN_8:
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+ align = 7;
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+ break;
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+#endif
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+ default:
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+ return ret;
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+ }
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+
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+ if (bp->triggered)
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+ ret = arch_store_info(bp, tsk);
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+
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+ if (ret < 0)
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+ return ret;
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+ /*
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+ * Check that the low-order bits of the address are appropriate
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+ * for the alignment implied by len.
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+ */
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+ if (bp->info.address & align)
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+ return -EINVAL;
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+
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+ /* Check that the virtual address is in the proper range */
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+ if (tsk) {
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+ if (!arch_check_va_in_userspace(bp->info.address, bp->info.len))
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+ return -EFAULT;
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+ } else {
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+ if (!arch_check_va_in_kernelspace(bp->info.address,
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+ bp->info.len))
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+ return -EFAULT;
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+ }
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+ return 0;
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+}
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+
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+void arch_update_user_hw_breakpoint(int pos, struct task_struct *tsk)
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+{
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+ struct thread_struct *thread = &(tsk->thread);
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+ struct hw_breakpoint *bp = thread->hbp[pos];
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+
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+ thread->debugreg7 &= ~dr7_masks[pos];
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+ if (bp) {
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+ thread->debugreg[pos] = bp->info.address;
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+ thread->debugreg7 |= encode_dr7(pos, bp->info.len,
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+ bp->info.type);
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+ } else
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+ thread->debugreg[pos] = 0;
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+}
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+
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+void arch_flush_thread_hw_breakpoint(struct task_struct *tsk)
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+{
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+ int i;
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+ struct thread_struct *thread = &(tsk->thread);
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+
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+ thread->debugreg7 = 0;
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+ for (i = 0; i < HBP_NUM; i++)
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+ thread->debugreg[i] = 0;
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+}
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+
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+/*
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+ * Handle debug exception notifications.
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+ *
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+ * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
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+ *
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+ * NOTIFY_DONE returned if one of the following conditions is true.
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+ * i) When the causative address is from user-space and the exception
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+ * is a valid one, i.e. not triggered as a result of lazy debug register
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+ * switching
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+ * ii) When there are more bits than trap<n> set in DR6 register (such
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+ * as BD, BS or BT) indicating that more than one debug condition is
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+ * met and requires some more action in do_debug().
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+ *
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+ * NOTIFY_STOP returned for all other cases
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+ *
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+ */
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+int __kprobes hw_breakpoint_handler(struct die_args *args)
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+{
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+ int i, cpu, rc = NOTIFY_STOP;
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+ struct hw_breakpoint *bp;
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+ /* The DR6 value is stored in args->err */
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+ unsigned long dr7, dr6 = args->err;
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+
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+ /* Do an early return if no trap bits are set in DR6 */
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+ if ((dr6 & DR_TRAP_BITS) == 0)
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+ return NOTIFY_DONE;
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+
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+ /* Lazy debug register switching */
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+ if (!test_tsk_thread_flag(current, TIF_DEBUG))
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+ arch_uninstall_thread_hw_breakpoint();
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+
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+ get_debugreg(dr7, 7);
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+ /* Disable breakpoints during exception handling */
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+ set_debugreg(0UL, 7);
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+ /*
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+ * Assert that local interrupts are disabled
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+ * Reset the DRn bits in the virtualized register value.
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+ * The ptrace trigger routine will add in whatever is needed.
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+ */
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+ current->thread.debugreg6 &= ~DR_TRAP_BITS;
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+ cpu = get_cpu();
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+
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+ /* Handle all the breakpoints that were triggered */
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+ for (i = 0; i < HBP_NUM; ++i) {
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+ if (likely(!(dr6 & (DR_TRAP0 << i))))
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+ continue;
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+ /*
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+ * Find the corresponding hw_breakpoint structure and
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+ * invoke its triggered callback.
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+ */
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+ if (i >= hbp_kernel_pos)
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+ bp = per_cpu(this_hbp_kernel[i], cpu);
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+ else {
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+ bp = current->thread.hbp[i];
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+ if (bp)
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+ rc = NOTIFY_DONE;
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+ }
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+ /*
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+ * bp can be NULL due to lazy debug register switching
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+ * or due to the delay between updates of hbp_kernel_pos
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+ * and this_hbp_kernel.
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+ */
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+ if (!bp)
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+ continue;
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+
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+ (bp->triggered)(bp, args->regs);
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+ }
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+ if (dr6 & (~DR_TRAP_BITS))
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+ rc = NOTIFY_DONE;
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+
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+ set_debugreg(dr7, 7);
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+ put_cpu_no_resched();
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+ return rc;
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+}
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+
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+/*
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+ * Handle debug exception notifications.
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+ */
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+int __kprobes hw_breakpoint_exceptions_notify(
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+ struct notifier_block *unused, unsigned long val, void *data)
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+{
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+ if (val != DIE_DEBUG)
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+ return NOTIFY_DONE;
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+
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+ return hw_breakpoint_handler(data);
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+}
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