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@@ -114,8 +114,10 @@ static inline void unmask_gic_int(unsigned int irq_nr)
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PNX8550_GIC_REQ(irq_nr) = (1<<26 | 1<<16) | (1<<28) | gic_prio[irq_nr];
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}
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-static inline void mask_irq(unsigned int irq_nr)
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+static inline void mask_irq(struct irq_data *d)
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{
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+ unsigned int irq_nr = d->irq;
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+
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if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) {
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modify_cp0_intmask(1 << irq_nr, 0);
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} else if ((PNX8550_INT_GIC_MIN <= irq_nr) &&
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@@ -129,8 +131,10 @@ static inline void mask_irq(unsigned int irq_nr)
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}
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}
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-static inline void unmask_irq(unsigned int irq_nr)
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+static inline void unmask_irq(struct irq_data *d)
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{
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+ unsigned int irq_nr = d->irq;
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+
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if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) {
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modify_cp0_intmask(0, 1 << irq_nr);
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} else if ((PNX8550_INT_GIC_MIN <= irq_nr) &&
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@@ -157,10 +161,8 @@ int pnx8550_set_gic_priority(int irq, int priority)
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static struct irq_chip level_irq_type = {
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.name = "PNX Level IRQ",
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- .ack = mask_irq,
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- .mask = mask_irq,
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- .mask_ack = mask_irq,
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- .unmask = unmask_irq,
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+ .irq_mask = mask_irq,
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+ .irq_unmask = unmask_irq,
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};
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static struct irqaction gic_action = {
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@@ -180,10 +182,8 @@ void __init arch_init_irq(void)
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int i;
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int configPR;
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- for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) {
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+ for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++)
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set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq);
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- mask_irq(i); /* mask the irq just in case */
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- }
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/* init of GIC/IPC interrupts */
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/* should be done before cp0 since cp0 init enables the GIC int */
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